Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier
Reexamination Certificate
2001-11-26
2003-06-03
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
With attachment to temporary support or carrier
Reexamination Certificate
active
06573158
ABSTRACT:
TECHNICAL FIELD
The present invention relates to semiconductor wafer processing techniques, and particularly to a technique effective for use in handling semiconductor wafers when the semiconductor wafers are processed to a very small thickness of 100 &mgr;m or below.
BACKGROUND ART
Now, in the semiconductor devices required to be thin as well as high density and small size, such as semiconductor devices applied to IC cards, thinner packages than the usual ones are used, such as TQFP (thin quad flat package) and TSOP (thin small outline package). In order to manufacture such packages, it is necessary to make the semiconductor wafers particularly thin. Here, the known techniques for making the semiconductor wafers thin, as for example described in “PRACTICAL LECTURES VlSI PACKAGING TECHNOLOGY (the second volume)” published by NIKKEI BP Co., Ltd. on May 31, 1993, pp. 12 to 14, are three types of grinding, chemical etching and lapping. As in the publication, the grinding is the technique for grinding the rear surface of a semiconductor wafer with a diamond grindstone, the etching is the technique for etching the rear surface of a semiconductor wafer with a mixture of chiefly fluoric acid and nitric acid while the semiconductor wafer is being rotated with high speed, and the lapping is the technique for grinding the rear surface of a semiconductor wafer with abrasive grains.
The thinning process by the grinding or lapping is able to grind semiconductor wafers of general thickness, or about 625 &mgr;m (or 725 &mgr;m) to a thickness of about 300 &mgr;m, but has a difficulty when trying to grind to a thickness of, for example, 100 &mgr;m or below because the semiconductor wafer might be cracked even under strict care when removing it from the grinder. Even if the wafer is not cracked, it is remarkably warped depending on the stress in the passivation film on the wafer surface and the internal stress of the wafer. This warp causes operational problems in the following processes such as dicing. In addition, it is difficult to process large-diameter semiconductor wafers, or 12-inch or above wafers to a specified level of flatness and uniformity.
Moreover, in the thinning process by etching, since the wafer is rotated at high speed, an excessive stress is exerted on the semiconductor wafer by the pins that hold its outer peripheral portion at a plurality of locations, thus breaking the wafer. Furthermore, a warp will occur due to the internal stress as in the grinding.
In order to solve the above problems, the inventors have found to fix the semiconductor wafer to a certain support base with tape and process it after various examinations. However, normal tape is also discarded after use in the process of each wafer, thus increasing the cost, or causing a new problem.
Accordingly, it is an object of the invention to provide a technique capable of making semiconductor wafers thin without any crack by solving the above technical problems.
It is another object of the invention to provide a technique capable of making semiconductor wafers thin under easy operation.
It is still another object of the invention to provide a technique capable of making semiconductor wafers thin without any warp.
It is further object of the invention to provide a technique capable of making semiconductor wafers thin at low cost.
The features of the invention, and the above objects of the invention together with other objects will be best understood by the following description, taken in conjunction with the accompanying drawings.
DISCLOSURE OF INVENTION
A typical one of the inventions disclosed in this application will be described briefly as below.
The semiconductor wafer processing method according to the invention includes a first step of preparing a plate-like or film-shaped carrier that is formed of a base and an adhesive member provided on one surface of the base, a second step of producing a wafer composite by bonding a semiconductor wafer to the carrier in such a manner that the rear surface of the wafer with no circuit elements formed therein is opposite to the carrier, and a third step of making the semiconductor wafer thin by spin-coating an etchant on the rear surface of the semiconductor wafer of the wafer composite that is supported with its semiconductor wafer side up.
In this semiconductor wafer processing method, the semiconductor wafer of the wafer composite is made to have a larger diameter than the carrier so that all the outer peripheral edge of the semiconductor wafer overhangs from the carrier when the wafer composite is formed by bonding the wafer on the carrier. In the third step, the semiconductor wafer can be thinned while a gas is being blown from below against the wafer composite. In addition, the semiconductor wafer may be made to have a diameter equal to or smaller than the carrier so that the peripheral edge of the wafer does not overhang from the carrier when the wafer composite is formed.
Moreover, after the semiconductor wafer is thinned by the third step, a fourth step and a fifth step may be provided. The fourth step is for sticking the rear side of the wafer on a dicing sheet and peeling off the carrier, and the fifth step is for dicing the semiconductor wafer on the dicing sheet into individual semiconductor chips.
The semiconductor wafer processing method of the invention includes a first step of preparing a semiconductor wafer with a passivation film formed on its main surface in which circuit elements are already built, a second step of preparing a plate-like or film-like carrier that is formed of a base and an adhesive member provided on one surface of the base, a third step of producing a wafer composite by bonding the semiconductor wafer to the carrier in such a manner that the rear surface of the wafer with no circuit elements formed therein is opposite to the carrier, and a fourth step of holding the wafer composite with its semiconductor wafer side up and spin-coating an etchant on the rear surface of the semiconductor wafer thereby to thin the semiconductor wafer. In this case, after thinning the semiconductor wafer at the fourth step, it is possible to add a fifth step of attaching the rear surface of the semiconductor onto a dicing sheet and peeling off the carrier from the wafer composite, and a sixth step of dicing the semiconductor wafer left on the dicing sheet into individual semiconductor chips.
The IC card producing method according to the invention includes a first step of preparing a plate-like or film-like carrier that is formed of a base and an adhesive member provided on one side of the base, a second step of producing a wafer composite by bonding a semiconductor wafer to the carrier in such a manner that the rear surface of the wafer with no circuit elements formed therein is opposite to the carrier, a third step of holding the wafer composite with its semiconductor wafer side up and spin-coating an etchant on the rear surface of the semiconductor wafer thereby to thin the semiconductor wafer, a fourth step of attaching the thinned rear surface of the semiconductor wafer to a dicing sheet and peeling off the carrier from the wafer composite, a fifth step of dicing the semiconductor wafer left on the dicing sheet into individual semiconductor chips, a sixth step of reducing or loosing or losing the adhesion of the dicing sheet, a seventh step of mounting one or ones of the semiconductor chips on a card substrate at chip-mounting positions, and an eighth step of producing an IC card by using the card substrate with the semiconductor chip or chips mounted.
According to the invention, there is provided an IC card producing method including a first step of preparing a semiconductor wafer with a passivation film formed on its main surface in which circuit elements are already built, a second step of preparing a plate-like or film-like carrier that is formed of a base and an adhesive member provided on one surface of the base, a third step of producing a wafer composite by bonding a semiconductor wafer to the carrier in such a manner that the rear surface o
Miyamoto Toshio
Tsubosaki Kunihiro
Usami Mitsuo
Fahmy Wael
Hitachi , Ltd.
Mattingly Stanger & Malur, P.C.
Peralta Ginette
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