Methods of moisture protection in semiconductor devices utilizin

Details Methods of moisture protection in semiconductor devices utilizin Methods of moisture protection in semiconductor devices utilizin

1992-07-22

1994-02-08

Kunemund, Robert

Fishing, trapping, and vermin destroying

437189, 437190, H01L 2352

Patent

active

052848019

ABSTRACT:
Integrated circuits include a silicon substrate having multiple conductive metallization lines placed thereon and vertically spaced apart from each other by polyimide insulating layers wherein a moisture resistant barrier layer is completely interposed between the polyimide layers and each metallization line. The moisture resistant barrier retards corrosion of the metallization lines by reaction products formed by the release of water from the polyimide layer by reducing the amount of water which can penetrate to the metallization lines.

REFERENCES:
patent: 3700497 (1972-10-01), Epifano et al.
patent: 4001870 (1977-01-01), Saiki et al.
patent: 4347306 (1982-08-01), Takeda et al.
patent: 4423547 (1984-01-01), Farrar et al.
patent: 4447824 (1984-05-01), Logan et al.
patent: 4495220 (1985-01-01), Wolf et al.
patent: 4541168 (1985-09-01), Galie et al.
patent: 4618878 (1986-11-01), Aoyama et al.
patent: 4661204 (1987-04-01), Mathur et al.
patent: 4837183 (1989-06-01), Polito et al.
patent: 4894351 (1990-01-01), Batty

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