Methods of microprocessor instruction result obfuscation

Details Methods of microprocessor instruction result obfuscation Methods of microprocessor instruction result obfuscation

2007-05-29

2007-05-29

Sparks, Donald (Department: 2181)

Electrical computers and digital processing systems: processing

Instruction decoding

Decoding instruction to accommodate plural instruction...

C712S208000, C712S227000

Reexamination Certificate

active

10688247

ABSTRACT:
A CPU executes program instructions which result in valid and invalid intermediate results. By selecting the desired intermediate results, a program is able to be successfully executed. Analysis of the intermediate results must avoid plausible wrong results. A programmable feature allows the instruction decoder to provide plural answers, including plausible wrong answers. Instruction output selection logic selects a predetermined buffer, and this permits further microprocessor operation with the correct intermediate result.

REFERENCES:
patent: 5081675 (1992-01-01), Kittirutsunetom
patent: 6643775 (2003-11-01), Granger et al.
patent: 6665796 (2003-12-01), Folmsbee

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