Methods of manufacturing semiconductor devices

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S435000, C438S437000, C438S700000, C438S735000, C438S736000, C438S739000, C438S743000, C438S744000, C438S757000, C438S787000

Reexamination Certificate

active

06943092

ABSTRACT:
Methods of manufacturing semiconductor devices are disclosed. In a disclosed example, a multi-layered insulating structure is deposited on a semiconductor substrate, an opening is formed in the multi-layered insulating structure above the semiconductor substrate, and a trench is formed in the semiconductor substrate under the opening. Then, a groove is formed on an edge position of an intermediate layer of the multi-layered insulating structure by wet-etching the intermediate layer of the multi-layered insulating layer transversely using a pull back process. Then, a liner oxide layer is deposited on the groove and the trench. An oxide layer then fills the trench and the groove without generating voids or divots in the oxide layer of the trench.

REFERENCES:
patent: 5578518 (1996-11-01), Koike et al.
patent: 5712185 (1998-01-01), Tsai et al.
patent: 5766823 (1998-06-01), Fumitomo
patent: 5868870 (1999-02-01), Fazan et al.
patent: 5910018 (1999-06-01), Jang
patent: 5940716 (1999-08-01), Jin et al.
patent: 6010947 (2000-01-01), Kondo
patent: 6027982 (2000-02-01), Peidous et al.
patent: 6066544 (2000-05-01), Pan et al.
patent: 6080637 (2000-06-01), Huang et al.
patent: 6117748 (2000-09-01), Lou et al.
patent: 6153479 (2000-11-01), Liao et al.
patent: 6165853 (2000-12-01), Nuttall et al.
patent: 6169021 (2001-01-01), Akram et al.
patent: 6191004 (2001-02-01), Hsiao
patent: 6214698 (2001-04-01), Liaw et al.
patent: 6284623 (2001-09-01), Zhang et al.
patent: 6313648 (2001-11-01), Syo
patent: 6355538 (2002-03-01), Tseng
patent: 6372602 (2002-04-01), Mitsuiki
patent: 6716718 (2004-04-01), Nagatani et al.
patent: 6723617 (2004-04-01), Choi
patent: 6734082 (2004-05-01), Zheng et al.
patent: 2002/0151143 (2002-10-01), Shiozawa et al.
patent: 2003/0027404 (2003-02-01), Lai et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods of manufacturing semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of manufacturing semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of manufacturing semiconductor devices will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3410466

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.