Methods of manufacturing a semiconductor device having a channel

Metal treatment – Compositions – Heat treating

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29571, 29576B, 148187, 357 91, B01J 1700, H01L 21263

Patent

active

043941818

ABSTRACT:
A method of manufacturing an insulated gate field effect transistor includes the provision of a first masking layer on a semiconductor body followed by the introduction of a dopant characteristic of the conductivity type of the semiconductor body into unmasked areas to form a channel stopper. The unmasked areas are then oxidized to form an inset oxide layer. Subsequently, the masking layer is removed to expose a window in the oxide layer, and then a second masking layer is provided on the oxide layer. The second masking layer includes a second window extending into the first window so that the sides of the second window are situated within the first window. The sides of the second window determine the width of the channel region in a subsequent implantation of ions characteristic of the conductivity type of the channel region. Consequently, the channel region is spaced apart from the channel stoppers, and a very narrow channel region, for example 2 micrometers, is provided.

REFERENCES:
patent: 4135955 (1979-01-01), Gasner et al.
patent: 4216573 (1980-08-01), Joshi et al.
patent: 4235011 (1980-11-01), Butler et al.
patent: 4277882 (1981-07-01), Crossley
patent: 4294002 (1981-10-01), Jambotkar et al.

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