Methods of making semiconductor assemblies with reinforced perip

Details Methods of making semiconductor assemblies with reinforced perip Methods of making semiconductor assemblies with reinforced perip

1998-02-09

1999-10-12

Booth, Richard

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

438118, 438127, G01R 3126, H01L 2166, H01L 2144, H01L 2148, H01L 2150

Patent

active

059665874

ABSTRACT:
A method of forming a microelectronic assembly having an element with contacts on a front surface thereof, an interposer with a plurality of connecting terminals in a connecting terminal region and bonding terminals in a bonding terminal region electrically connected to the connecting terminals includes the steps of juxtaposing the interposer with the microelectronic element so that the connecting terminals and bonding terminals of the interposer face away from the front surface of the element and so that the bonding terminal region is adjacent to the contacts of the microelectronic element; and connecting at least some of the contacts with at least some of the bonding terminals by a plurality of flexible leads while supporting the bonding terminals against the vertical movement to facilitate the connection.

REFERENCES:
patent: 4751482 (1988-06-01), Fukuta et al.
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5183711 (1993-02-01), Wada et al.
patent: 5346861 (1994-09-01), Khandros et al.
patent: 5525545 (1996-06-01), Grube et al.
patent: 5627405 (1997-05-01), Chillara
patent: 5677576 (1997-10-01), Akagawa

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