Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Patent
1998-03-31
2000-08-01
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
438113, 438119, 438121, 438124, H01L 2144, H01L 2148, H01L 2150
Patent
active
060965746
ABSTRACT:
A method of making a microelectronic assembly includes providing a first element and a second element with confronting, spaced-apart interior surfaces defining a space therebetween and contacts on the interior surfaces and masses of an electrically conductive material having a melting temperature below about 125.degree. C. in the space so that each mass is disposed between a contact on the first element and a contact on the second element and so that the masses electrically connect the contacts to one another. A flowable liquid material is then introduced around the masses and between the confronting surfaces, and the liquid material is then cured to form a compliant dielectric layer disposed between the confronting surfaces and intimately surrounding each mass.
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Jones Josetta
Niebling John F.
Tessera Inc.
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