Methods of making a low capacitance integrated circuit package

Details Methods of making a low capacitance integrated circuit package Methods of making a low capacitance integrated circuit package

1990-01-31

1991-01-08

Echols, P. W.

Metal working

Method of mechanical manufacture

Electrical device making

H01R 4300

Patent

active

049824945

ABSTRACT:
An integrated circuit package utilizing low temperature sealing glass and having reduced lead capacitance. Voids in the glass material on the base substrate and the cap substrate result in the formation of glass-free cavities when the base substrate is fused to the cap substrate. A lead frame extending from and passing through the glass material which couples the base substrate to the cap substrate also passes through the glass-free cavities, resulting in a reduced parasitic capacitance of the package leads.

REFERENCES:
patent: 3484534 (1969-12-01), Kilby et al.
patent: 3566212 (1971-02-01), Marx
patent: 3617819 (1971-11-01), Boisvert
patent: 3668299 (1972-06-01), McNeal
patent: 3760090 (1973-09-01), Fowler
patent: 4038488 (1977-07-01), Lin
patent: 4142203 (1979-02-01), Dietz
patent: 4701424 (1987-10-01), Mikkor

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