Methods of forming semiconductor packages

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S125000, C257SE27084, C257SE21646

Reexamination Certificate

active

07572670

ABSTRACT:
The invention includes semiconductor packages having a patterned substrate with openings extending therethrough, conductive circuit traces over the substrate and having portions extending over the openings, a semiconductor die over the circuit traces, and a matrix contacting the circuit traces and also contacting the die. The invention also includes methods of forming semiconductor packages. Such methods can include provision of a construction comprising an electrically conductive layer on a masking material. The layer has a first surface facing the masking material and a second surface in opposing relation to the first surface. The masking material is patterned to form openings extending to the first surface of the layer. The layer is then patterned. Subsequently, an integrated circuit die is provided over the second surface of the layer.

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