Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Encapsulating
Reexamination Certificate
2010-03-10
2011-11-15
Lee, Cheung (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Encapsulating
C438S106000, C438S637000, C438S708000, C257SE21502, C257SE21577
Reexamination Certificate
active
08058108
ABSTRACT:
Various semiconductor chips and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first opening in an insulating layer applied to a side of a semiconductor chip. The first opening does not extend through to the side. A second opening is formed in the insulating layer that exposes a portion of the side.
REFERENCES:
patent: 5854141 (1998-12-01), Cronin et al.
patent: 6022791 (2000-02-01), Cook et al.
patent: 6049124 (2000-04-01), Raiser et al.
patent: 6288439 (2001-09-01), Bandou
patent: 6493229 (2002-12-01), Akram et al.
patent: 7679200 (2010-03-01), Su et al.
patent: 2002/0043721 (2002-04-01), Weber
patent: 2003/0171001 (2003-09-01), Shinohara
patent: 2004/0026785 (2004-02-01), Tomita
patent: 2004/0188136 (2004-09-01), Sunohara et al.
patent: 2006/0180929 (2006-08-01), Kroehnert et al.
patent: 2006/0278957 (2006-12-01), Lin et al.
patent: 2007/0069336 (2007-03-01), Ning
patent: 2007/0138635 (2007-06-01), Ikumo et al.
patent: 2008/0073780 (2008-03-01), Imori
patent: 2008/0083959 (2008-04-01), Wu et al.
patent: 2008/0169555 (2008-07-01), Topacio
patent: 2009/0032909 (2009-02-01), Brofman et al.
patent: 2009/0166836 (2009-07-01), Kim et al.
patent: 2009/0302427 (2009-12-01), Su et al.
patent: 2010/0019381 (2010-01-01), Haeberlen et al.
U.S. Appl. No. 12/388,064, filed Feb. 18, 2009, Michael Z. Su et al.
U.S. Appl. No. 12/388,092, filed Feb. 18, 2009, Michael Su et al.
USPTO Office Action mailed May 3, 2010; U.S. Appl. No. 12/388,092.
Guotao Wang et. al.;Chip packaging interaction: a critical concern for Cu/low k packaging; www.sciencedirect.com; Microelectronics Reliability 45 (2005) 1079-1093.
Marie-Claude Paquet et al.;Underfill Selection Strategy for Pb-Free, Low-K and Fine Pitch Organic Flip Chip Applications; 2006 Electronic Components and Technology Conference; 1-4244-0152-6/06/$20.00 © 2006 IEEE; pp. 1595-1603.
John Baliga;Yet Another Way to Use BCB; Semiconductor International; http://www.semiconductor.net/article/CA6347341.html; Jul. 1, 2006; pp. 1-3.
PCT/US2010/024462 Partial International Search Report mailed Jun. 23, 2010.
PCT/US2010/024462 International Search Report mailed Dec. 14, 2010.
USPTO Notice of Allowance mailed Oct. 21, 2010; U.S. Appl. No. 12/388,092.
McLellan Neil
Topacio Roden R.
ATI Technologies ULC
Honeycutt Timothy M.
Lee Cheung
LandOfFree
Methods of forming semiconductor chip underfill anchors does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods of forming semiconductor chip underfill anchors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of forming semiconductor chip underfill anchors will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4311222