Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2006-04-18
2006-04-18
Smith, Zandra V. (Department: 2822)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S394000, C438S396000, C257S306000, C257S310000
Reexamination Certificate
active
07029983
ABSTRACT:
A MIM capacitor can be formed by forming an insulating layer on a source/drain region of a transistor. A first pattern is formed on the insulating layer. A recess is formed in the insulating layer using the first pattern, wherein the recess exposes the source/drain region. A first electrode layer is formed in the recess on the source/drain region. A dielectric layer and a second electrode layer are formed on the first electrode layer in the recess. A second pattern is formed on the second electrode layer. The MIM capacitor is formed by removing a portion of the second electrode and the dielectric layer using the second pattern.
REFERENCES:
patent: 5817555 (1998-10-01), Cho
patent: 5828092 (1998-10-01), Tempel
patent: 5972791 (1999-10-01), Schuele
patent: 6235580 (2001-05-01), Lee et al.
patent: 6277687 (2001-08-01), Agarwal
patent: 6475855 (2002-11-01), Fishburn
patent: 6518117 (2003-02-01), Ping et al.
patent: 2350929 (2000-12-01), None
patent: 2000-332221 (2000-11-01), None
Translation of Korean Office Action for corresponding Korean Application No. 10-2002-0001469 dated Dec. 26, 2003.
Myers Bigel & Sibley & Sajovec
Novacek Christy
Smith Zandra V.
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