Methods of forming metal layers in integrated circuit...

Details Methods of forming metal layers in integrated circuit... Methods of forming metal layers in integrated circuit...

2006-05-30

2006-05-30

Le, Thien M. (Department: 2876)

Registers

Coded record sensors

Particular sensor structure

C235S492000

Reexamination Certificate

active

07051934

ABSTRACT:
Methods of forming a metal layer in integrated circuit devices using selective electroplating in a recess are disclosed. In particular, a recess is formed in a surface of an insulating layer. The recess has a side wall inside the recess, a bottom inside the recess, and an edge at a boundary of the surface of the insulating layer and the side wall. A selective electroplating mask is formed on the side wall to provide a covered portion of the side wall and an exposed portion of the side wall. The exposed portion of the side wall can be electroplated with a metal. Related conductive contacts are also disclosed.

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Notice to Submit a Response for Korean patent application No. 10-1999-0022320 on Oct. 14, 2005.

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