Methods of forming field effect transistor gates

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S217000, C438S230000, C438S291000, C438S706000

Reexamination Certificate

active

07081416

ABSTRACT:
The invention includes methods of forming field effect transistor gates. In one implementation, a series of layers is formed proximate a semiconductive material channel region. The layers comprise a gate dielectric layer and a conductive metal-comprising layer having an ion implanted polysilicon layer received therebetween. Patterned masking material is formed over the series of layers. Using the patterned masking material as a mask, etching is conducted through the conductive metal-comprising layer and only partially into the ion implanted polysilicon layer. After such etching, the ion implanted polysilicon is annealed effective to electrically activate implanted impurity atoms received therein. Other aspects and implementations are contemplated.

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patent: 6281064 (2001-08-01), Mandelman et al.
patent: 6455367 (2002-09-01), Clampitt et al.
U.S. Appl. No. 09/971,250, filed Oct. 04, 2001, Agarwal.

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