Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1997-06-30
1999-06-22
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438721, 438742, 216 41, 216 67, 216 79, H01L 2100
Patent
active
059142766
ABSTRACT:
Methods of forming electrically conductive lines include the steps of forming a first electrically insulating layer (e.g., SiO.sub.2) on a face of a semiconductor substrate and then forming a layer of polycrystalline silicon (polysilicon) as a blanket layer on the first electrically insulating layer. A metal silicide layer (e.g., TiSix) is then formed on the polysilicon layer by reacting the polysilicon layer with an appropriate metal such as titanium (Ti) using a thermal treatment step. Thereafter, a second electrically insulating layer (e.g., SiO.sub.2, Si.sub.3 N.sub.4) is formed on the metal silicide layer using conventional techniques. A layer of photoresist is then deposited onto the second electrically insulating layer and patterned as an etching mask using conventional photolithographic processing steps. The second electrically insulating layer, metal silicide layer and polysilicon layers are then sequentially etched to define a plurality of spaced conductive lines which each comprise a composite of a polysilicon layer and metal silicide layer thereon. Preferably, the metal silicide layer and the polysilicon layer are sequentially dry etched by exposing these layers to a composite gas containing Cl.sub.2 and N.sub.2 gases which are provided at preferred volumetric flow rates and temperatures greater than 23.degree. C. (i.e., room temperature) so that the amount of polymer residue generated during the etching step is sufficient to protect the interface between the metal silicide layer and the polysilicon layer from lateral overetching but not so excessive as to prevent complete removal of those portions of the metal silicide and polysilicon layers exposed by the openings in the patterned layer of photoresist.
REFERENCES:
patent: 4678540 (1987-07-01), Uchimura
patent: 5188980 (1993-02-01), Lai
patent: 5512331 (1996-04-01), Miyakuni
patent: 5582679 (1996-12-01), Lianjun et al.
patent: 5605601 (1997-02-01), Kawasaki
Chi Kyeong-koo
Shin Hwa-sook
Powell William
Samsung Eletronics Co., Ltd.
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