Methods of forming DRAM memory cells

Details Methods of forming DRAM memory cells Methods of forming DRAM memory cells

2009-04-06

2011-10-04

Nguyen, Thanh (Department: 2893)

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

C438S244000, C438S253000, C438S387000, C438S618000, C977S773000, C257SE21586, C257SE21658

Reexamination Certificate

active

08030168

ABSTRACT:
The invention includes methods of electrically interconnecting different elevation conductive structures, methods of forming capacitors, methods of forming an interconnect between a substrate bit line contact and a bit line in DRAM, and methods of forming DRAM memory cells. In one implementation, a method of electrically interconnecting different elevation conductive structures includes forming a first conductive structure comprising a first electrically conductive surface at a first elevation of a substrate. A nanowhisker is grown from the first electrically conductive surface, and is provided to be electrically conductive. Electrically insulative material is provided about the nanowhisker. An electrically conductive material is deposited over the electrically insulative material in electrical contact with the nanowhisker at a second elevation which is elevationally outward of the first elevation, and the electrically conductive material is provided into a second conductive structure. Other aspects and implementations are contemplated.

REFERENCES:
patent: 5332910 (1994-07-01), Haraguchi et al.
patent: 5956594 (1999-09-01), Yang et al.
patent: 6297063 (2001-10-01), Brown et al.
patent: 6383923 (2002-05-01), Brown et al.
patent: 6806228 (2004-10-01), Sharma et al.
patent: 7105428 (2006-09-01), Pan et al.
patent: 7335908 (2008-02-01), Samuelson et al.
patent: 7339186 (2008-03-01), Mio et al.
patent: 2002/0024085 (2002-02-01), Nakamura et al.
patent: 2004/0023471 (2004-02-01), Adu et al.
patent: 2004/0144970 (2004-07-01), Wang et al.
patent: 2005/0011431 (2005-01-01), Samuelson et al.
Bhunia et al., “Metalorganic vapor-phase epitaxial growth and characterization of vertical InP nanowires”, Appl. Phys. Lett., vol. 83, No. 16, pp. 3371-3373 (Oct. 20, 2003).
Bjork et al., “One-dimensional heterostructures in semiconductor nanowhiskers”, Appl. Phys. Lett., vol. 80, No. 6 pp. 1058-1060 (Feb. 11, 2002).
Ohlsson et al., “Size-, shape-, and position-controlled GaAs nano-whiskers”, Appl. Phys. Lett., vol. 79, No. 20, pp. 3335-3337 (Nov. 12, 2001).
Ozaki et al., “Silicon nanowhiskers grown on a hydrogen-terminated silicon (111) surface”, Appl. Phys. Lett., vol. 73, No. 25, pp. 3700-3702 (Dec. 21, 1998).
Schubert et al., “Silicon nanowhiskers grown on (111) Si substrates by molecular-beam epitaxy”, Appl. Phys. Lett., vol. 84, No. 24, pp. 4968-4970 (Mar. 10, 2003).
Tu et al., “Self-assembled vertical GaN nanorods grown by molecular-beam epitaxy”, Appl. Phys. Lett., vol. 82, No. 10, pp. 1601-1603 (Mar. 10, 2003).

Affiliated with

Also associated with

Rating

Methods of forming DRAM memory cells does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of forming DRAM memory cells, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of forming DRAM memory cells will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4295013