Semiconductor device manufacturing: process – Voltage variable capacitance device manufacture
Reexamination Certificate
2011-08-02
2011-08-02
Ho, Tu-Tu V (Department: 2818)
Semiconductor device manufacturing: process
Voltage variable capacitance device manufacture
C438S231000, C257S312000, C257S596000, C257S599000, C257SE29344, C257SE21364, C716S103000
Reexamination Certificate
active
07989302
ABSTRACT:
Methods of forming hyper-abrupt p-n junctions and design structures for an integrated circuit containing devices structures with hyper-abrupt p-n junctions. The hyper-abrupt p-n junction is defined in a SOI substrate by implanting a portion of a device layer to have one conductivity type and then implanting a portion of this doped region to have an opposite conductivity type. The counterdoping defines the hyper-abrupt p-n junction. A gate structure carried on a top surface of the device layer operates as a hard mask during the ion implantations to assist in defining a lateral boundary for the hyper-abrupt p-n junction.
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Johnson Jeffrey B.
Joseph Alvin J.
Rassel Robert M.
Shi Yun
Ho Tu-Tu V
International Business Machines - Corporation
Wood Herron & Evans LLP
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