Methods of fabricating strained semiconductor-on-insulator...

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Ordered or disordered

Reexamination Certificate

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C438S037000, C438S046000, C438S087000, C257S063000, C257S219000, C257S223000

Reexamination Certificate

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11199313

ABSTRACT:
A method of fabricating a semiconductor device includes forming a strained first semiconductor layer on an insulating layer that is between second semiconductor layers. The strained first semiconductor layer may be epitaxially grown from the second semiconductor layers to extend onto the insulating layer between the second semiconductor layers. The second semiconductor layers have a lattice constant that is different than that of the first semiconductor layer, such that strain may be created in the first semiconductor layer. Related devices are also discussed.

REFERENCES:
patent: 6815278 (2004-11-01), Ieong et al.
Ghani et al. “A 90nm High Volume Manufacturing Logic Technology Featuring Novel 45nm Gate Length Strained Silicon CMOS Transistors”,IEDM(2003).
Rim et al. “Fabrication and Mobility Characteristics of Ultra-thin Strained Si Directly on Insulator (SSDOI) MOSFETs”,IEDM3:49-52 (2003).
STMicroelectronics,Silicon on Nothing, Challenge 1stEdition 2002.

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