Methods of fabricating high voltage, high temperature...

Semiconductor device manufacturing: process – Making passive device – Planar capacitor

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S396000, C438S624000

Reexamination Certificate

active

06998322

ABSTRACT:
Capacitors and interconnection structures for silicon carbide are provided having an oxide layer, a layer of dielectric material and a second oxide layer on the layer of dielectric material. The thickness of the oxide layers may be from about 0.5 to about 33 percent of the thickness of the oxide layers and the layer of dielectric material. Capacitors and interconnection structures for silicon carbide having silicon oxynitride layer as a dielectric structure are also provided. Such a dielectric structure may be between metal layers to provide a metal-insulator-metal capacitor or may be used as a inter-metal dielectric of an interconnect structure so as to provide devices and structures having improved mean time to failure. Methods of fabricating such capacitors and structures are also provided.

REFERENCES:
patent: 3924024 (1975-12-01), Naber et al.
patent: 4466172 (1984-08-01), Batra
patent: 4875083 (1989-10-01), Palmour
patent: 5170231 (1992-12-01), Fujii et al.
patent: 5170455 (1992-12-01), Goossen et al.
patent: 5184199 (1993-02-01), Fujii et al.
patent: 5185689 (1993-02-01), Maniar
patent: 5302933 (1994-04-01), Kudo et al.
patent: 5479316 (1995-12-01), Smrtic et al.
patent: 5506421 (1996-04-01), Palmour
patent: 5510630 (1996-04-01), Agarwal et al.
patent: 5587870 (1996-12-01), Anderson et al.
patent: 5589705 (1996-12-01), Saito et al.
patent: 5726463 (1998-03-01), Brown et al.
patent: 5739564 (1998-04-01), Kosa et al.
patent: 5763905 (1998-06-01), Harris
patent: 5812364 (1998-09-01), Oku et al.
patent: 5837572 (1998-11-01), Gardner et al.
patent: 5877045 (1999-03-01), Kapoor
patent: 5885870 (1999-03-01), Maiti et al.
patent: 5939763 (1999-08-01), Hao et al.
patent: 5946567 (1999-08-01), Weng et al.
patent: 5960289 (1999-09-01), Tsui et al.
patent: 5972788 (1999-10-01), Ryan et al.
patent: 5972801 (1999-10-01), Lipkin et al.
patent: 6025608 (2000-02-01), Harris et al.
patent: 6028012 (2000-02-01), Wang
patent: 6048766 (2000-04-01), Gardner et al.
patent: 6054352 (2000-04-01), Ueno
patent: 6063698 (2000-05-01), Tseng et al.
patent: 6096607 (2000-08-01), Ueno
patent: 6100169 (2000-08-01), Suvorov et al.
patent: 6100184 (2000-08-01), Zhao et al.
patent: 6107142 (2000-08-01), Suvorov et al.
patent: 6117735 (2000-09-01), Ueno
patent: 6136728 (2000-10-01), Wang
patent: 6165822 (2000-12-01), Okuno et al.
patent: 6190973 (2001-02-01), Berg et al.
patent: 6204203 (2001-03-01), Narwankar et al.
patent: 6211035 (2001-04-01), Moise et al.
patent: 6221700 (2001-04-01), Okuno et al.
patent: 6228720 (2001-05-01), Kitabatake et al.
patent: 6238967 (2001-05-01), Shiho et al.
patent: 6239463 (2001-05-01), Williams et al.
patent: 6246076 (2001-06-01), Lipkin et al.
patent: 6297172 (2001-10-01), Kashiwagi
patent: 6316791 (2001-11-01), Schorner et al.
patent: 6342748 (2002-01-01), Nakamura et al.
patent: 6344663 (2002-02-01), Slater, Jr. et al.
patent: 6455892 (2002-09-01), Okuno et al.
patent: 6593620 (2003-07-01), Hshieh et al.
patent: 6610366 (2003-08-01), Lipkin et al.
patent: 6767843 (2004-07-01), Lipkin et al.
patent: 2001/0055852 (2001-12-01), Moise et al.
patent: 2002/0072247 (2002-06-01), Lipkin et al.
patent: 198 09 554 (1998-09-01), None
patent: 19900171 (2000-12-01), None
patent: 10036208 (2002-02-01), None
patent: 0 637 069 (1995-02-01), None
patent: 0 637 069 (1995-02-01), None
patent: 03157974 (1991-07-01), None
patent: 08264766 (1996-10-01), None
patent: 09205202 (1997-08-01), None
patent: 11191559 (1999-07-01), None
patent: 11238742 (1999-08-01), None
patent: 11261061 (1999-09-01), None
patent: 11266017 (1999-09-01), None
patent: 11274487 (1999-10-01), None
patent: 2000049167 (2000-02-01), None
patent: 2000082812 (2000-03-01), None
patent: 2000-252461 (2000-09-01), None
patent: 02000252461 (2000-09-01), None
patent: 2000106371 (2001-04-01), None
patent: WO 97/17730 (1997-05-01), None
patent: WO 97/39485 (1997-10-01), None
patent: WO 98/02924 (1998-01-01), None
patent: WO99/63591 (1999-12-01), None
patent: WO 00-13236 (2000-03-01), None
A.K. Agarwal, J.B. Casady, L.B. Rowland, W.F. Valek, and C.D. Brandt, “1400 V 4H-SiC Power MOSFET's,” Materials Science Forum vols. 264-268, pp. 989-992, 1998.
A.K. Agarwal, J.B. Casady, L.B. Rowland, W.F. Valek, M.H. White, and C.D. Brandt, “1.1 kV 4H-SiC Power UMOSFET's,”IEEE Electron Device Letters, vol. 18, No. 12, pp. 586-588, Dec. 1997.
A.K. Agarwal, N.S. Saks, S.S. Mani, V.S. Hegde and P.A. Sanger, “Investigation of Lateral RESURF, 6H-SiC MOSFETs,”Materials Science Forum, vols. 338-342, pp. 1307-1310, 2000.
A.V. Suvorov, L.A. Lipkin, G.M. Johnson, R. Singh and J.W. Palmour, “4H-SiC Self-Aligned Implant-Diffused Structure for Power DMOSFETs,”Materials Science Forumvols. 338-342, pp. 1275-1278, 2000.
Agarwal et al. “Temperature Dependence of Fowler-Nordheim Current in 6H-and 4H-SiC MOS Capacitors,”IEEE Electron Device Letters. vol. 18, No. 12, Dec. 1997, pp. 592-594.
Chakraborty et al. “Interface properties of N2O-annealed SiO2/SiC systems,”Proc. 2000 IEEE Electron Devices Meeting. Hong Kong, China, Jun. 24, 2000, pp. 108-111.
Chang et al. “Observation of a Non-stoichiometric Layer at the Silicon Dioxide—Silicon Carbide Interface: Effect of Oxidation Temperature and Post-Oxidation Processing Conditions,”Mat. Res. Soc. Symp. Proc.vol. 640, 2001.
Cho et al. “Improvement of charge trapping by hydrogen post-oxidation annealing in gate oxide of 4H-SiC methel-oxide-semiconductor capacitors,”Applied Physics Letters. vol. 77, No. 8, pp. 1215-1217.
Chung et al. “The Effect of Si:C Source Ratio on SiO2/SiC Interface State Density for Nitrogen Doped 4H and 6H-SiC,”Materials Science Forum. (2000) vol. 338-342, pp. 1097-1100.
Chung et al., “Effects of Anneals in Ammonia on the Interface Trap Density Near the Band Edges in 4H-Silicon Carbide Metal-Oxide-Semiconductor Capacitors”,Applied Physics Letters, vol. 77, No. 22, Nov. 27, 2000, pp. 3601-3603.
D. Alok, E. Arnold, and R. Egloff, “Process Dependence of Inversion Layer Mobility in 4H-SiC Devices,”Materials Science Forum, vols. 338-342, pp. 1077-1080, 2000.
Das, Mrinal K. Graduate thesis entitled,Fundamental Studies of the Silicon Carbide MOS Structure. Purdue University.
De Mao et al., “Thermal Oxidation of SiC in N2O”,J. Electrochem. Soc., vol. 141, 1994, pp. L150-L152.
Fukuda et al. “Improvement of SiO2/4H-SiC Interface Using High-Temperature Hydrogen Annealing at Low Pressure and Vacuum Annealing,”Jpn. J. Appl. Phys.vol. 38, Apr. 1999, pp. 2306-2309.
Fukuda et al. “Improvement of SiO2/4H-SiC Interface by Using High Temperature Hydrogen Annealing at 1000° C.,”Extended Abstracts of the International Conference on Solid State Devices and Materials. Japan Society of Applied Physics, Tokyo, Japan, Sep. 1998.
G.Y Chung, C.C. Tin, J.R. Williams, K. McDonald, M. Di Ventra, S.T. Pantelides, L.C. Feldman, and R.A. Weller, “Effect of nitric oxide annealing on the interface trap densities near the band edges in 4H.”Applied Physics Letters, vol. 76, No. 13, pp. 1713-1715, Mar. 2000.
G.Y. Chung, C.C. Tin, J.R. Williams, K. McDonald, R.A. Weller, S.T. Pantelides, L.C. Feldman, M.K. Das, and J.W. Palmour, “Improved Inversion Channel Mobility for 4H-SiC MOSFETs Following High Temperature Anneals in Nitric Oxide,”IEE Electron Device Lettersaccepted for publication.
H.F. Li, S. Dimitrijev, H.B. Harrison, D. Sweatman, and P.T. Tanner. “Improving SiO2Grown on P-Type 4H-SiC by NO Annealing.”Materials Science Forum. vols. 264-268 (1998) pp. 869-872.
J. Tan, J.A. Cooper, Jr., and Mr.R. Melloch, “High-Voltage Accumulation-Layer UMOSFETs in 4H-SiC,”IEEE Electron Device Letters, vol. 19, No. 12, pp. 487-489, Dec. 1998.
J.B. Casady, A.K. Agarwal, L.B. Rowland, W.F. Valek, and C.D. Brandt, “900 V DMOS and 1100 V UMOS 4H-SiC Power FETs,”IEEE Device Research Conference, Ft. Collins, CO Jun. 23-25, 1997.
J.N. Shenoy, J.A. Cooper and M.R. Meelock, “Hig

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods of fabricating high voltage, high temperature... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of fabricating high voltage, high temperature..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of fabricating high voltage, high temperature... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3695823

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.