Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2001-07-12
2004-02-17
Vo, Peter (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S840000, C029S855000, C257S739000, C257S779000, C361S764000
Reexamination Certificate
active
06691406
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to semiconductor packaging and, more particularly, to a method for attaching an integrated circuit die to a substrate.
2. Background of the Related Art
This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Packaging of electrical circuits is a key element in the technological development of any device containing electrical components. A single integrated circuit die is typically encapsulated within a sealed package to be mounted on a printed circuit board (PCB) or a similar apparatus for incorporation into a system. The integrated circuit die is generally encapsulated within a molding compound to protect the die from external contamination or physical damage. Because the integrated circuit die is generally encapsulated, the encapsulated integrated circuit package must also provide a system of interconnects for electrically coupling the integrated circuit die to a PCB or other external device.
Three common surface mount techniques include chip-on-board (COB), board-on-chip (BOC), and flip-chip (F/C). For COB packages, the integrated circuit die is attached to a substrate. In one type of COB package, the integrated circuit die may be attached to the substrate “face-up”. That is to say that the side of integrated circuit die containing the bond pads for wire bonding the die to the substrate are left exposed on the top surface. The backside of the die, not containing the bond pads, is adhered to the substrate. In this type of package, bond wires are attached to the exposed surface of the die down to pads on the top surface of the substrate. The substrate contains electrical traces which route the signals from the top side of the substrate to the external connections.
Alternately, the integrated circuit die may be mounted on the substrate “face-down,” to create a BOC package. In this instance, the substrate typically contains a slot. Since the die is mounted face-down, the bond pads on the surface of the die are arranged to correlate with the slot opening in the substrate. Bond wires are attached from the bond pads on the die, through the slot on the substrate, to the backside of the substrate. The substrate contains electrical routing to distribute electrical signals along the backside of the substrate
Regardless of whether the integrated circuit die is mounted on the substrate face-up (COB) or face-down (BOC), the entire package is generally encapsulated in a molding compound. Various techniques, such as pin and array (PGA) or ball grid array (BGA), may then be incorporated to provide a means of connecting the integrated circuit package to a PCB or other external device.
For F/C packages, the integrated circuit die is mounted on the substrate face-down as described in the BOC package description above. For a F/C package, bond wires are not used to electrically couple the integrated circuit die to the substrate. Instead, solder bumps located on the face of the integrated circuit die are aligned with conductive pads on the mounting side of the substrate. The solder bumps may be reflowed to electrically couple the die to the substrate. The substrate contains electrical routing to distribute the electrical signals from the die, along the backside of the substrate. As with a BOC package, a F/C package is generally encapsulated in a molding compound, and PGA or BGA technologies may be incorporated to provide a means of connecting the integrated circuit package to a PCB or other external device.
Regardless of whether BOC or F/C packaging technology is incorporated, a key component in the packaging process is the attachment of the integrated circuit die to the substrate. One method of attaching a die to a substrate is to apply a paste to the die or the substrate and to dispose the die onto the substrate. Disadvantageously, typical paste application methods can create an inconsistent bond line, which my create die stress and eventual cracking during the automated wire-bonding. Further, inconsistent paste coverage may create voids and result in die cracking or attachment failures. Also, paste applications may result in underfill at the die edges which may result in die peeling.
Another method of attaching the integrated circuit die to the substrate is to use an adhesive tape. While tape may minimize the problems associated with current die mount techniques using paste, tape is expensive compared to paste. Tape may cost four to six times as much per part as paste, resulting in a significant increase in the price of the integrated circuit package.
The present invention may address one or more of the problems set forth above.
SUMMARY OF THE INVENTION
Certain aspects commensurate in scope with the disclosed embodiments are set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of certain forms the invention might take and that these aspects are not intended to limit the scope of the invention. Indeed, the invention may encompass a variety of aspects that may not be set forth below.
In one embodiment of the present invention, there is provided a system comprising a processor and an integrated circuit package. The integrated circuit package contains a memory device which is coupled to a substrate. The substrate comprises a plurality of protrusions on its surface which are configured to form barriers to hold an adhesive paste within the barriers. The memory device is disposed on the top of the barriers and coupled to the substrate by the adhesive paste
In another embodiment of the present invention, there is provided an integrated circuit package. The integrated circuit package contains an integrated circuit device which is coupled to a substrate. The substrate comprises a plurality of protrusions on its surface which are configured to form barriers to hold an adhesive paste within the barriers. The integrated circuit device is disposed on the top of the barriers and coupled to the substrate by the adhesive paste.
In another embodiment of the present invention, there is provided a substrate. The substrate comprises a plurality of protrusions on its surface which are configured to form barriers to hold an adhesive paste within the barriers. An integrated circuit device may be disposed on the top of the barriers and coupled to the substrate by the adhesive paste.
In yet another embodiment of the present invention, there is provided a method of attaching an integrated circuit device to a substrate. The method comprises the acts of providing a substrate, forming a plurality of walls on the substrate, dispensing an adhesive material within the walls of the substrate, and disposing an integrated circuit device on the top of the walls.
In still another embodiment of the present invention, there is provided another method of attaching an integrated circuit device to a substrate. The method comprises the acts of providing a substrate, the substrate comprising a plurality of walls, dispensing an adhesive material within the walls of the substrate, and disposing and integrated circuit device on the top of the walls.
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Jiang Tongbi
Prindivill Casey L.
Fletcher Yoder
Nguyen Donghai D.
Vo Peter
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