Methods of contacting lines and methods of forming an...

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Reexamination Certificate

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C438S675000, C257S377000

Reexamination Certificate

active

06790663

ABSTRACT:

TECHNICAL FIELD
This invention relates to methods of forming contacts, to methods of contacting lines, and to methods of operating integrated circuitry. The invention also relates to integrated circuits.
BACKGROUND OF THE INVENTION
Conductive lines which are utilized in integrated circuitry are often formed with widened areas called contact or landing pads. The purpose of these pads is to provide an extra degree of protection should a misalignment occur between a contact opening which is formed over the line. While advantages are gained in reducing the chances of a misalignment-induced failure, valuable wafer real estate is consumed by the widened pads.
Referring to
FIG. 1
, a portion of an exemplary prior art layout is shown generally at
10
and includes conductive lines
12
,
14
and
16
having widened contact pads
18
,
20
and
22
, respectively. To conserve wafer real estate, it is usually desirable to provide conductive lines
12
,
14
,
16
to have a minimum pitch which is defined in large part by the minimum photolithographic feature size used to fabricate the circuitry. Minimizing the pitch of the lines ensures that the space between the lines, represented at S, is as small as possible. Yet, to ensure that subsequently formed contacts to the conductive lines do not short to the substrate, the above-described widened contact pads are used. A design trade-off, however, is that in order to maintain a desired pitch between the conductive lines, and to avoid forming the contact pads too close together, the contact pads must necessarily be moved outwardly of one another. For example, in
FIG. 1
, contact pad
18
is moved outward in the direction of arrow A. Other contact pads can be spaced even further out depending on the dimensions of the contact pads. This results in consumption of valuable wafer real estate.
SUMMARY OF THE INVENTION
Methods of forming contacts, methods of contacting lines, methods of operating integrated circuitry, and related integrated circuitry constructions are described. In one embodiment, a plurality of conductive lines are formed over a substrate and diffusion regions are formed within the substrate elevationally below the lines. The individual diffusion regions are disposed proximate individual conductive line portions and collectively define therewith individual contact pads with which electrical connection is desired. Insulative material is formed over the conductive line portions and diffusion regions, with contact openings being formed therethrough to expose portions of the individual contact pads. Conductive contacts are formed within the contact openings and in electrical connection with the individual contact pads. In a preferred embodiment, the substrate and diffusion regions provide a pn junction which is configured for biasing into a reverse-biased diode configuration. In operation, the pn junction is sufficiently biased to preclude electrical shorting between the conductive line and the substrate for selected magnitudes of electrical current provided through the conductive line and the conductive material forming the conductive contacts.


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