Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2002-07-26
2004-01-27
Nhu, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S048000
Reexamination Certificate
active
06683371
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the field of semiconductor device packaging. More specifically, the invention relates to methods of manufacturing ball grid array semiconductor packages for the packaging of semiconductor devices.
2. Description of Related Art
Some known methods of packaging semiconductor devices, such as semiconductor dies, integrated circuit chips, and the like, may include dual in-line packaging, pin grid array packaging, tape carrier packaging, and quad flat packaging. Nevertheless, as a pin count of a semiconductor device increases, the complexity of manufacturing semiconductor device packages using these known methods also may increase. Employing ball grid arrays semiconductor packages in order to package semiconductor devices may reduce the complexity of manufacturing semiconductor device packages because the ball grid array may serve as an electrical contact between the semiconductor package and an external component, such as a motherboard of a computer. Some known ball grid array packaging methods may include etching a conductor pattern onto either a first surface or a second surface of a substrate, and providing a plurality of conductive bump contact areas on the first surface of the substrate. With these known methods, a conductive bump, such as a semi-spherical or a substantial spherical solder bump, subsequently may be disposed on each of the conductive bump contact areas, and a semiconductor die may be mounted on or attached to the second surface of the substrate. Moreover, the conductive bumps may be electrically connected to the conductor pattern, such as by any known reflow process, which also may mechanically affix the conductive bumps to the first surface of the substrate. Nevertheless, if the conductive bump contact areas are not substantially aligned with their corresponding conductive bump before the conductive bumps are disposed on the first surface of the substrate, a sufficient electrical connection between the conductive bumps and the conductive bump contact areas may not be achieved. Moreover, if the conductive bumps are of a non-uniform height, it may be more difficult to mount the conductive bumps to an external component, such as a motherboard of a computer, than if the conductive bumps were of a uniform height. Moreover, when the height of the conductive bumps are non-uniform, an electrical connection between the some of the conductive bumps and the external component may be weakened.
SUMMARY OF THE INVENTION
Therefore, a need has arisen for methods of manufacturing a ball grid array package which may overcome these and other shortcoming of the related art. A technical advantage of the present invention is that a conductive contact area of a substrate may be substantially aligned with a conductive bump before the conductive bump is disposed on the conductive contact area. Another technical advantage of the present invention is that the conductive bumps may have a substantially uniform height.
According to an embodiment of the present invention, a method for manufacturing a ball grid array semiconductor package is described. The method comprises the step of providing a substrate having a first surface and a second surface, in which the first surface or the second surface comprises a conductor pattern. The method also comprises the step of disposing a plurality of conductor bumps on the first surface of the substrate and attaching a semiconductor die to the second surface of the substrate. The method further comprises the step of electrically connecting the conductive bumps to the conductor pattern, such that electrically connecting the conductive bumps to the conductor pattern mechanically affixes the conductive bumps to the first surface of the substrate. The method also comprises the steps of mechanically testing the ball grid array semiconductor package to determine whether a height of the conductive bumps are substantially uniform, and planarizing the conductive bumps when the height of the conductive bumps are non-uniform.
According to another embodiment of the present invention, a method for manufacturing a ball grid array semiconductor package is described. The method comprises the step of providing a substrate having a first surface and a second surface, in which the first surface or the second surface comprises a conductor pattern. The method also comprises the steps of providing a plurality of conductive bump contact areas on the first surface of the substrate, and substantially aligning each of the conductive bump contact areas with at least one conductive bump. The method further comprises the step of disposing at least one of the conductor bumps on each of the conductive bump contact areas. Moreover, the step of substantially aligning the conductive bump contact areas with at least one of the conductive bumps comprises the step of vibrating at least a portion of the substrate, which substantially aligns each of the conductive bump contact areas with at least one of said conductive bumps. The method further comprises the step of electrically connecting the conductive bumps to the conductor pattern, such that electrically connecting the conductive bumps to the conductor pattern mechanically affixes the conductive bumps to the first surface of the substrate. The method also comprises the steps of mechanically testing the ball grid array semiconductor package to determine whether a height of the conductive bumps are substantially uniform, and planarizing the conductive bumps when the height of the conductive bumps are non-uniform.
According to yet another embodiment of the present invention, a planarizing apparatus is described. The planarizing apparatus comprises a planarizing surface and means, e.g., a vacuum, for picking up a ball grid array semiconductor package comprising a plurality of conductive bumps affixed to a first surface of a substrate. Moreover, the means for picking up the ball grid array package contacts the conductive bumps with the planarizing surface with a predetermined amount of force.
Other features and advantages will be apparent to persons of ordinary skill in the art in view of the following detailed description of the invention and the accompanying drawings.
REFERENCES:
patent: 5992729 (1999-11-01), Koopman et al.
patent: 6455350 (2002-09-01), Bayot et al.
Arabe Ferdinand B.
Bayot Arthur Allan
Brady III Wade James
Nhu David
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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