Methods for wafer-level packaging of microelectronic devices...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S738000, C257S701000

Reexamination Certificate

active

06885101

ABSTRACT:
Methods for packaging microelectronic devices, microelectronic workpieces having packaged dies, and microelectronic devices. One aspect of the invention is directed toward a microelectronic workpiece comprising a substrate having a device side and a backside. In one embodiment, the microelectronic workpiece further includes a plurality of dies formed on the device side of the substrate, a dielectric layer over the dies, and a plurality of bond-pads on the dielectric layer. The dies have integrated circuitry and a plurality of bond-pads electrically coupled to the integrated circuitry. The ball-pads are arranged in ball-pad arrays over corresponding dies on the substrate. The ball-pads of one array, for example, are electrically coupled to the bond-pads of the corresponding die. The microelectronic workpiece of this embodiment further includes a protective film over the dielectric layer. In one embodiment, the workpiece further includes solder balls attached to corresponding ball-pads, and the protective film covers the dielectric layer in between the solder balls. The solder balls in this embodiment also have exposed contact sites such that the protective film can cover side portions of the solder balls but not a top surface of the solder balls.

REFERENCES:
patent: 5518957 (1996-05-01), Kim
patent: 5851845 (1998-12-01), Wood et al.
patent: 5933713 (1999-08-01), Farnworth
patent: 5946553 (1999-08-01), Wood et al.
patent: 6004867 (1999-12-01), Kim et al.
patent: 6008070 (1999-12-01), Farnworth
patent: 6020624 (2000-02-01), Wood et al.
patent: 6072236 (2000-06-01), Akram et al.
patent: 6124634 (2000-09-01), Akram et al.
patent: 6184465 (2001-02-01), Corisis
patent: 6187615 (2001-02-01), Kim et al.
patent: 6194250 (2001-02-01), Melton et al.
patent: 6228687 (2001-05-01), Akram et al.
patent: 6235552 (2001-05-01), Kwon et al.
patent: 6271469 (2001-08-01), Ma et al.
patent: 6300782 (2001-10-01), Hembree et al.
patent: 6326697 (2001-12-01), Farnworth
patent: 6326698 (2001-12-01), Akram
patent: 6368896 (2002-04-01), Farnworth et al.
patent: 6407381 (2002-06-01), Glenn et al.
patent: 6441473 (2002-08-01), Deshmukh
patent: 6503780 (2003-01-01), Glenn et al.
patent: 6552423 (2003-04-01), Song et al.
patent: 6635363 (2003-10-01), Duclos et al.
The Dow Chemical Company, “Processing Procedures for Dry-Etch CYCLOTENE Advanced Electronics Resins (Dry-Etch BCB),” Nov. 1997, Midland, MI, 8 pages.
The Dow Chemical Company, “BCB Properties,” 1995-2002, http://www.dow.com/cyclotene/over.htm, accessed Jan. 8, 2003, 2 pages.
The Dow Chemical Company, “Bumping/Redistribution/Wafer Level Packaging (WLP),” 1995-2002, http://www.dow.com/cyclotene/apps/appl1.htm, accessed Jan. 8, 2003, 2 pages.
Lintec Corporation, ADWILL LE5950 Material Safety Data Sheet, 3 pages, Aug. 28, 2001, Tokyo, Japan.
Ablestik Laboratories, RP-695-2E Material Safety Data Sheet, 6 pages, Nov. 6, 2002, Rancho Dominguez, California.
Ablestik Laboratories, RP-695-2E2 Material Safety Data Sheet, 6 pages, Dec. 3, 2002, Rancho Dominguez, California.
Ablestik Laboratories, Experimental Product RP-695-2E, Non-Conductive WBL Film for Die Encapsulation, 2 pages, Nov. 2002, Rancho Dominguez, California.
Ablestik Laboratories, Technical Data Sheet, Experimental Product RP-695-2E, Non-Conductive WBL Film for Die Encapsulation, 2 pages, Dec. 2002, Rancho Dominguez, California.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods for wafer-level packaging of microelectronic devices... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for wafer-level packaging of microelectronic devices..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for wafer-level packaging of microelectronic devices... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3425949

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.