Methods for scan path debugging

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371 221, G01R 3128

Patent

active

054106869

ABSTRACT:
A scan path debugger isolates and identifies hardware and software faults in a computer system containing scan path logic. A user can readily define what information is to be examined and in what format. The user can toggle between displaying information in data-aligned format or time-aligned format. The user may temporarily suspend control of the scan path debugger to allow the system to be controlled temporarily by a different, unrelated program. The user can check the operation of the system under different microcode files. The user can also save the complete logic state of the system under test, execute one or more scan path debugger instructions while observing the results, restore the saved state, execute the same or different instructions, and observe the results.

REFERENCES:
patent: 4455624 (1984-06-01), Haag et al.
patent: 4879646 (1989-11-01), Iwasaki et al.
patent: 5111458 (1992-05-01), Hara
patent: 5276862 (1994-01-01), McCulley et al.

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