Methods for programming a memory device and memory devices...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185180, C365S185230, C365S185280

Reexamination Certificate

active

07916546

ABSTRACT:
Methods for programming a memory array and memory devices are disclosed. In one such method, inhibited bit lines are charged to an inhibit voltage that is less than a supply voltage. The word lines of memory cells to be programmed are biased at a programming preparation voltage that is less than a nominal programming preparation voltage as used in the conventional art. Programming pulses can be applied to selected word lines of the memory cells to be programmed when the uninhibited bit lines are at 0V.

REFERENCES:
patent: 5999444 (1999-12-01), Fujiwara et al.
patent: 6804150 (2004-10-01), Park et al.
patent: 6987694 (2006-01-01), Lee
patent: 7209388 (2007-04-01), Kanda

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