Methods for preparing and devices with treated dummy moats

Details Methods for preparing and devices with treated dummy moats Methods for preparing and devices with treated dummy moats

2007-12-31

2010-11-09

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S682000, C438S692000, C257SE21546, C257SE21304, C257SE21593

Reexamination Certificate

active

07829430

ABSTRACT:
Devices and methods are presented to fabricate dummy moats in an isolation region on a substrate. Presently, dummy moats are prone to losing impedance after the silicidation process. In high-voltage devices, silicided dummy moats reduce the breakdown voltage between active regions, particularly when the dummy moat overlaps or is in close proximity to a junction. The present devices and methods disclose a dummy moat covered with an oxide layer. During the silicidation process, the dummy moat and other designated isolation regions remain non-silicided. Thus, high and stable breakdown voltages are maintained.

REFERENCES:
patent: 6805614 (2004-10-01), Kwok
patent: 7498639 (2009-03-01), Steinmann et al.
patent: 7531415 (2009-05-01), Kwok
patent: 2005/0042880 (2005-02-01), Kwok
patent: 2006/0073672 (2006-04-01), Steinmann et al.

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