Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2011-06-14
2011-06-14
Huisman, David J (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S220000
Reexamination Certificate
active
07962718
ABSTRACT:
A permutation instruction generates vector elements for a destination register using identified source and destination registers. A plurality of partial table lookups corresponding to an extended table produces a plurality of intermediate results. At least one source register stores a plurality of index values corresponding to the extended table. Out-of-range index values are values that are not contained in at least one additional source register and result in a predetermined constant value being stored into a predetermined vector element of the destination register. The index values are adjusted between the partial table lookups. A final result is formed by performing a logic function with the plurality of intermediate results. The final result is thereby formed without a full table lookup of each element of the final result.
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Non-Final Office Action mailed Jun. 4, 2010 for U.S. Appl. No. 11/871,659, 22 pages.
Freescale Semiconductor Inc.
Huisman David J
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