Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step
Reexamination Certificate
2005-05-31
2005-05-31
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Including adhesive bonding step
C257S758000, C257S759000, C257S782000
Reexamination Certificate
active
06900076
ABSTRACT:
Certain embodiments of the present invention relate to a method for manufacturing a semiconductor chip, a method for manufacturing a semiconductor device, a semiconductor chip, a semiconductor device, a connection substrate and an electronic apparatus, in which semiconductor chips stacked in layers are electrically connected to one another without using wires. In one embodiment, after an electrode18is formed on a surface16of a first semiconductor chip12,a hole26is formed from an opposite surface24thereof until a tungsten layer20of the electrode18is exposed. A protrusion30is formed by etching on a surface31of a second semiconductor chip14and thereafter an abutting electrode32is formed on an apex section of the protrusion30.The first semiconductor chip12and the second semiconductor chip14are stacked on top of the other such that the abutting electrode32contacts the electrode18.As a result, the path between the electrodes becomes shorter and therefore signal delays are inhibited or prevented. Also, there are no restrictions on the area of semiconductor chips to be stacked. As a result, semiconductor chips having the same area can be stacked in layers, and thus the size of the semiconductor device10can be reduced.
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Hara Akitoshi
Komiyama Tadashi
Sato Eiichi
Ha Nathan W.
Konrad Raynes & Victor LLP
Pham Long
Raynes Alan S.
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