Methods for manufacturing a semiconductor package having a sacri

Details Methods for manufacturing a semiconductor package having a sacri Methods for manufacturing a semiconductor package having a sacri

1996-04-18

1999-12-14

Monin, Jr., Donald L.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

438110, 438126, 438127, H01L 2156

Patent

active

06001671&

ABSTRACT:
A method of manufacturing a semiconductor chip package. A sacrificial layer is used as a base to selectively form an array of conductive pads such that a central region is defined by the pads. A back surface of a semiconductor chip is next attached to the sacrificial layer within the central region between the pads so that the contact bearing surface of the chip faces away from the sacrificial layer. The chip contacts are then electrically connected to respective pads, typically by wire bonding a wire therebetween. A curable, dielectric liquid encapsulant is then deposited on the sacrificial layer such that the pads, electrical connections and chip are fully encapsulated, as by an overmolding operation. The encapsulant is then cured and the sacrificial layer is either completely removed or is selectively removed to expose a surface of the pads for electrical attachment to a PWB and the back surface of the chip for creating a direct thermal path from the chip to the PWB.

REFERENCES:
patent: 4530152 (1985-07-01), Roche et al.
patent: 4566184 (1986-01-01), Higgins et al.
patent: 4890383 (1990-01-01), Lumbard et al.
patent: 5148265 (1992-09-01), Khandros et al.
patent: 5148266 (1992-09-01), Khandros et al.
patent: 5200362 (1993-04-01), Lin et al.
patent: 5367766 (1994-11-01), Burns et al.
patent: 5418186 (1995-05-01), Park et al.
patent: 5436203 (1995-07-01), Lin
patent: 5468999 (1995-11-01), Lin et al.
patent: 5474958 (1995-12-01), Djennas et al.
patent: 5487999 (1996-01-01), Farnworth
Okuno et al., "New Packaging of Chip on Board By Unique Printing Method," Proceedings of 41.sup.st Electronic Components and Technology Conference, IEEE 1991, pp. 843-847.
Crowley et al., "Chip-Size Packaging Developments," TechSearch International, Inc., .COPYRGT.1995, pp. 46-51.

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