Methods for making transistor structures

Details Methods for making transistor structures Methods for making transistor structures

1976-11-03

1977-07-26

Tupman, W.

Metal working

Method of mechanical manufacture

Assembling or joining

29591, 357 23, B01J 1700

Patent

active

040373088

ABSTRACT:
In one embodiment, an extremely short channel FET is made by forming a metal layer over a wafer, depositing silicon dioxide over part of the metal layer, oxidizing the exposed metal, controllably etching a portion of the silicon dioxide to expose a small strip of the nonoxidized metal layer, electroplating the exposed metal strip, thereby to form an extremely narrow gate electrode, removing the deposited SiO.sub.2, the metal oxide and the remaining metal layer to leave only the gate electrode, and using the gate electrode as a mask for ion implanting source and drain regions. Since the gate electrode can be made so narrow, the channel region is correspondingly short to give extremely high frequency capabilities. Other embodiments are also described.

REFERENCES:
patent: 3514844 (1970-06-01), Bower
patent: 3699646 (1972-10-01), Vadasz
Neus Aus der Technik, Feb. 1972, vol. 1, pp. 1 & 2, "Preparation of Semiconductor Components with Narrow Semiconducting Regions, etc.".

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