Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2005-11-22
2005-11-22
Thai, Luan (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S124000, C438S126000, C438S118000
Reexamination Certificate
active
06967127
ABSTRACT:
Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.
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Amagai, Masazumi, “Chip-Scale Packages for Center-Pad Memory Devices,” Chip Scale Review, May 1998, pp. 68-77.
Koon Eng Meow
Leng Ser Bok
Poo Chia Yong
Waf Low Siu
Yu Chan Min
Micro)n Technology, Inc.
Thai Luan
TraskBritt
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