Methods for forming shallow trench isolation structures in...

Details Methods for forming shallow trench isolation structures in... Methods for forming shallow trench isolation structures in...

2006-12-12

2006-12-12

Lebentritt, Michael (Department: 2812)

Semiconductor device manufacturing: process

Making passive device

Trench capacitor

C438S387000, C438S386000, C257SE21545

Reexamination Certificate

active

07148117

ABSTRACT:
Methods for forming STI structures in semiconductor devices are disclosed. A disclosed method comprises: forming a buffer oxide layer on a silicon substrate; implanting ions into the entire surface of the resulting structure and removing the buffer oxide layer; depositing a gate oxide layer, a polysilicon layer and a nitride layer, forming a photoresist pattern; forming the trench of the STI structure by perform an etching process using the photoresist pattern as an etching mask; forming a thin oxide layer inside the trench and on the nitride layer on the entire surface of the resulting structure; filling the trench with an insulating layer; planarizing the insulating layer by performing a CMP process using the nitride layer as an etching stop layer; performing a recessing process to etch the planarized insulating layer and the thin oxide layer on the trench to a predetermined depth; forming a photoresist pattern on the nitride layer; and forming the gate electrodes by performing an etching process using the photoresist pattern as a mask pattern.

REFERENCES:
patent: 5913113 (1999-06-01), Seo
patent: 6420770 (2002-07-01), Xiang et al.
patent: 6777336 (2004-08-01), Lin et al.
patent: 6784077 (2004-08-01), Lin et al.
patent: 2002/0119666 (2002-08-01), Kim et al.

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