Methods for forming lateral and vertical DMOS transistors

Details Methods for forming lateral and vertical DMOS transistors Methods for forming lateral and vertical DMOS transistors

1985-07-22

1987-07-28

Ozaki, George T.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29580, 29576B, H01L 21425, H01L 21465

Patent

active

046824057

ABSTRACT:
A transistor is provided which includes an electrical contact (122) formed in a V-shaped groove (118). Because of the unique shape of the electrical contact, a smaller surface area is required for its formation thus rendering it possible to construct a transistor having a smaller surface area. The groove is formed by anisotropically etching an expitaxial layer (102) on a semiconductor substrate (100) using, for example, KOH.

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patent: 4598461 (1986-07-01), Love
Kendall, Don, "On Etching Very Narrow Grooves in Silicon", Applied Physics Letters, vol. 26, No. 4, Feb. 15, 1975, pp. 195-198.
Baliga et al., "The Insulated Gate Transistor: A New Three-Terminal MOS Controlled Bipolar Power Device", IEEE Transactions, vol. ED-31, No. 6, 6/84, pp. 821-828.
Pshaenich, Al, "The MOS SCR, A New Thyristor Technology", Engineering Bulletin EB-103, Motorola Inc., 1982, 5 pages.
U.S. patent application Ser. No. 811,925, Cogan et al., "High Density Vertical DMOS Transistor", filed 12/19/85.

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