Methods for forming gate electrodes of semiconductor devices

Details Methods for forming gate electrodes of semiconductor devices Methods for forming gate electrodes of semiconductor devices

1999-06-09

2001-03-06

Powell, William (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

C438S719000, C438S740000, C438S742000

Reexamination Certificate

active

06197693

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to methods for forming semiconductor devices; and, more particularly, to methods for forming gate electrodes of semiconductor devices. The invention can prevent the layer of metal comprised of a gate electrode from being oxidized in the re-oxidation process which is performed to compensate for etching damage.
DESCRIPTION OF THE PRIOR ART
FIG. 1
shows the processes for forming a gate electrode of a semiconductor device according to the prior art. Referring to the drawing, On a silicon substrate are, in turn, formed a gate oxide layer
11
, a layer of polysilicon
12
, a layer of diffusion barrier
13
and a layer of tungsten
14
. All of the layers are selectively etched to form a pattern of gate electrode as shown in the drawing.
In the etching process to form the gate electrode pattern as described in the above, damage is generated. In order to compensate for the damage, re-oxidation process is performed with thermal oxidation manner. However, there was a drawback in the art that oxidation was also generated in the exposed tungsten layer on the gate electrode, during the re-oxidation process.
In order to solve the problem described as above, research and development has been proceeding for the purpose of developing the technology in which the silicon substrate is selectively oxidized without oxidation of the layer of metal such as tungsten. However, the technology is not practically introduced into the manufacturing processes of semiconductor devices yet.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a method for forming gate electrodes of semiconductor devices which prevents the layer of metal constructed for the gate electrode from being oxidized in the re-oxidation process which compensates for the damage generated in the etching process for forming the pattern of gate electrode.
In accordance with an embodiment of the present invention, there is provided a method for forming gate electrodes of semiconductor devices which comprises the steps of: forming, in turn, a layer of polysilicon, a etching stopping layer and a sacrificed layer over a semiconductor substrate; selectively etching the sacrificed layer, the etching stopping layer and the polysilicon layer to form a pattern of gate electrode; performing a thermal oxidation process in order to compensate for etching damage generated; forming an inter-layer insulating layer over the entire structure after completion of the thermal oxidation and partially removing the interlayer insulating layer until the sacrificed layer is exposed; removing the sacrificed layer and the etching stopping layer to form an opening through which the polysilicon layer is exposed; forming a layer of metal over the entire structure after forming the opening; and selectively removing the metal layer to remain the metal layer only within the opening, thereby, forming the gate electrode made of the polysilicon layer and the metal layer.
According to the method of the present, the pattern of gate electrode is formed by etching. Re-oxidation is then performed to compensate for the etching damage. An interlayer insulating layer is then formed over the entire structure and an opening is formed in the insulating layer. Here, the opening is formed so as to expose the part of polysilicon layer connected with a metal layer that will be formed later. After this, the metal layer is buried within the opening to complete the formation of the gate electrode made of poly-metal structure.


REFERENCES:
patent: 5807786 (1998-09-01), Chang
patent: 5837577 (1998-11-01), Cherng
patent: 5994231 (1999-11-01), Sonego et al.
patent: 10-214809 (1998-08-01), None

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