Methods for fabricating semiconductor devices having reduced...

Details Methods for fabricating semiconductor devices having reduced... Methods for fabricating semiconductor devices having reduced...

2011-04-05

2011-04-05

Wojciechowicz, Edward (Department: 2895)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S270000, C438S296000, C438S435000

Reexamination Certificate

active

07919388

ABSTRACT:
Embodiments of a method for fabricating a semiconductor device having a reduced gate-drain capacitance are provided. In one embodiment, the method includes the steps of etching a trench in a semiconductor substrate utilizing an etch mask, widening the trench to define overhanging regions of the etch mask extending partially over the trench, and depositing a gate electrode material into the trench and onto the overhanging regions. The gate electrode material merges between the overhanging regions prior to the filling of the trench to create an empty fissure within the trench. A portion of the semiconductor substrate is removed through the empty fissure to form a void cavity proximate the trench.

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