Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2000-08-15
2002-07-02
Chaudhuri, Olik (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S691000, C438S692000, C430S192000
Reexamination Certificate
active
06413834
ABSTRACT:
TECHNICAL FIELD
The invention pertains to methods for etching silicon dioxide, and in particular embodiments pertains to methods for altering the selectivity of an etch for silicon dioxide relative to silicon nitride. The invention also pertains to methods of forming isolation regions.
BACKGROUND OF THE INVENTION
Silicon dioxide materials are commonly used in fabrication of semiconductor devices. Accordingly, numerous semiconductor fabrication processes involve etching of silicon dioxide materials. Another commonly used material in semiconductor fabrication processes is silicon nitride. In various processes, it can be desired to adjust etch selectivity for silicon dioxide relative to silicon nitride. For purposes of interpreting this disclosure and the claims that follow, the term “etch selectivity” refers to a rate of removal of one material relative to another material. For instance, an etch which is selective for silicon dioxide relative to silicon nitride is defined as an etch which removes silicon dioxide faster than silicon nitride. Adjustment of etch selectivity is defined to mean alteration of the rate of an etch of one material relative to another material. For instance, adjustment of etch selectivity for silicon dioxide relative to silicon nitride means that the rate of removal of silicon dioxide relative to silicon nitride is either increased or decreased.
An exemplary prior art process wherein it can be desired to adjust etch selectivity for silicon dioxide relative to silicon nitride is described with reference to
FIGS. 1-4
. Referring initially to
FIG. 1
, a semiconductor wafer fragment
10
is illustrated. Wafer fragment
10
comprises a substrate
12
which can comprise, for example, monocrystalline silicon lightly doped with a background of p-type dopant. To aid in interpretation of the claims that follow, the terms “semiconductive substrate” and “semiconductor substrate” are defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
A silicon dioxide layer
14
is formed over substrate
12
, and a silicon nitride layer
16
is formed over silicon dioxide layer
14
. Oxide
14
is provided to alleviate stresses that could occur if nitride
16
were placed directly on substrate
12
. For purposes of interpreting this disclosure and the claims that follow, a layer referred to as a “silicon dioxide layer” is a layer which comprises silicon dioxide, but it not a layer which consists essentially of, or consists of, silicon dioxide unless such is stated explicitly. Also, a silicon nitride layer is a layer which comprises silicon nitride, but is not a layer which consists of, or consists essentially of, silicon nitride unless such is stated explicitly.
Silicon nitride layer
16
and silicon dioxide layer
14
are patterned and have an opening
18
extending therethrough. Silicon nitride layer
16
and silicon dioxide layer
14
can be patterned utilizing photoresist (not shown) and photolithographic processing.
Referring to
FIG. 2
, opening
18
is extended into substrate
12
.
FIG. 3
shows an insulative material
20
formed within opening
18
a and over silicon nitride material
16
. Insulative material
20
can comprise, for example, silicon dioxide.
Referring to
FIG. 4
, the silicon dioxide material
20
from
FIG. 3
is subjected to an etch, such as, for example, chemical-mechanical polishing, to remove the silicon dioxide material
20
from over silicon nitride
16
while leaving material
20
within opening
18
. The etch leaves an upper surface
22
, which is intended to be a planarized upper surface. The material
20
remaining with opening
18
forms an isolation region, which can be utilized for electrically isolating conductive circuitry (not shown) formed over and/or within substrate
12
.
A problem associated with the prior art processing is shown in
FIG. 4
as a dishing of the top surface of material
20
. Specifically, the chemical-mechanical polishing has removed silicon dioxide material
20
too rapidly relative to silicon nitride material
16
, and has accordingly dished an upper surface of material
20
, rather than forming a desired planarized upper surface. It would be desirable to develop methods wherein the selectivity of an etch for silicon dioxide relative to silicon nitride can be adjusted to alleviate or avoid the dishing shown in FIG.
4
.
SUMMARY OF THE INVENTION
In one aspect, the invention encompasses a semiconductor processing method in which silicon dioxide is etched with a solution that comprises an alkyl peroxide. An exemplary alkyl peroxide is methyl peroxide.
In another aspect, the invention encompasses a method of forming an isolation region. A patterned silicon nitride material is formed over a semiconductive substrate. The patterned silicon nitride material has an opening extending therethrough. The opening is further extended into the substrate underlying the silicon nitride material, and is then filled with silicon dioxide. Subsequently, the silicon dioxide is chemical-mechanical polished with a slurry having an alkyl peroxide therein.
REFERENCES:
patent: 5212044 (1993-05-01), Liang et al.
patent: 6060370 (2000-05-01), Hsia et al.
Thin Film Processes, John L. Vossen et al Academic Press, inc. 1978 pp. 424, 425, 430.*
Handbook of Semiconductor Silicon Technology, O'Mara et al Noyes publishers 1990 p. 198.
Blum David S
Chaudhuri Olik
Micro)n Technology, Inc.
Wells St. John P.S.
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