Patent
1995-06-07
1997-07-15
Teska, Kevin J.
H03K 1728
Patent
active
056491670
ABSTRACT:
A method and a structure for implementing integrated circuit designs into a plurality of clocked and unclocked reprogrammable logic circuits. Software structures analyze the target logic circuit, form clusters, partitions the integrated circuit design and implement the partitions into the clocked and unclocked reprogrammable logic circuits in order to prevent hold time violation artifacts.
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Chen Nang-Ping
Huang Thomas B.
Ko Robert J.
Li Jeong-Tyng
Wang Ming-Yang
Fiul Dan
Quickturn Design Systems Inc.
Teska Kevin J.
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