Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Patent
1998-02-13
2000-11-28
Bowers, Charles
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
438633, 438623, 438693, 438697, H01L 21304
Patent
active
061535257
ABSTRACT:
A process for the formation and planarization of polymeric dielectric films on semiconductor substrates and for achieving high chemical mechanical polish removal rates when planarizing these films. A cured, globally planarized, polymeric dielectric thin film is produced on a semiconductor substrate by (a) depositing a polymeric, dielectric film composition onto a surface of a semiconductor substrate; (b) partially curing the deposited film; (c) performing a chemical mechanical polishing step to said partially cured dielectric film, until said dielectric film is substantially planarized; and (d) subjecting the polished film to an additional curing step. Preferred dielectric films are polyarylene ether and/or fluorinated polyarylene ether polymers which are deposited by a spin coating process onto a semiconductor substrate. A thermal treatment partially cures the polymer. A chemical mechanical polishing step achieves global planarization. Another thermal treatment accomplishes a final cure of the polymer. In this way, the chemical mechanical polishing removal rate is increased compared to the removal rate for a fully cured polymer film.
REFERENCES:
patent: 4222792 (1980-09-01), Lever et al.
patent: 4789648 (1988-12-01), Chow et al.
patent: 4944836 (1990-07-01), Beyer et al.
patent: 5302233 (1994-04-01), Kim et al.
patent: 5376590 (1994-12-01), Machida
patent: 5397741 (1995-03-01), O'Conner et al.
patent: 5516729 (1996-05-01), Dawson
patent: 5525191 (1996-06-01), Maniar et al.
patent: 5612254 (1997-03-01), Mu et al.
patent: 5705028 (1998-01-01), Matsumoto
patent: 5888905 (1999-03-01), Taylor
patent: 5930652 (1999-07-01), Mukerji
patent: 5952243 (1999-09-01), Forester
El-Kareh, Badih, Fundamentals of Semiconductor Processing, Kluwer Academic Publishers, Boston, pp. 568-570, 1995.
Wolf, Stanley, "Silcon Processing for the VLSI Era", vol. 2, pp. 232-234, 1990.
"Preimidization Chemical Mechanical Polishing Of Polyimide Coatings", Research Disclosure, No. 328, Aug. 1, 1991, p. 583. XP000217885.
Patent Abstracts of Japan, vol. 016, No. 200, (E-1201), May 13, 1992, & JP 04 030524 A (Fujitsu Ltd; others: 01), Feb. 3, 1992.
Research Disclosure No. 328, Aug. 1991, p. 583 Preimidization Chemical Mechanical Polishing of Polyimide Coatings.
Sivaram, et al, Solid State Technology, vol. 35, No. 5, May 1992, pp. 87-91 planarizing Interlevel Dielectrics by Chemical Mechanical Polishing.
Homma, et al, CMP-MIC Conference, Feb. 22-23, 1996, pp. 67-73, Selective CMP of Organic SOG for Low Parasitic Capacitance Quarter-Micron, Multilevel Interconnections.
Hendricks Neil H.
Towery Daniel L.
Allied-Signal Inc.
Bowers Charles
Kilday Lisa
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