Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2011-04-19
2011-04-19
Kik, Phallaka (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S106000, C716S103000, C703S016000
Reexamination Certificate
active
07930662
ABSTRACT:
Approaches for generating a design of an electronic system are disclosed. In one approach, for each of one or more components of a first specification of the design, an error mitigation technique is selected from among multiple different error mitigation techniques in response to user-specified data associated with the first specification of the design. A second specification of the design is automatically generated from the first specification. The second specification includes error mitigation logic corresponding to each selected error mitigation technique for each of the one or more components. The second specification of the design is stored for subsequent processing.
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Bennett David W.
Corbett John D.
Mason Jeffrey M.
Sundararajan Prasanna
Cartier Lois D.
Kik Phallaka
Maunu LeRoy D.
Xilinx , Inc.
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