Methods for adjusting the coupling capacitor of a multi-stage we

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341120, H03M 110

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active

054345693

ABSTRACT:
A circuit for adjusting capacitors in a capacitor analog to digital converter has a main capacitor array including more than one capacitor array portion 20 and 22, and at least one first coupling capacitor C.sub.c. A first plate of each first coupling capacitor C.sub.c is coupled to one capacitor array portion 22 and a second plate of each first coupling capacitor C.sub.c is coupled to a next more significant capacitor array portion 20 such that each capacitor array portion is coupled to the next more significant capacitor array portion by one of the first coupling capacitors C.sub.c. The circuit has at least one second coupling capacitor C.sub.c3 with a first plate of each second coupling capacitor C.sub.c3 coupled to the first plate of a corresponding one of the first coupling capacitors C.sub.c. The circuit also has at least one array of calibration capacitors 60-84 with first plates of each array of calibration capacitors 60-84 coupled to a second plate of a corresponding one of the second coupling capacitors C.sub.c3 and second plates of each array of calibration capacitors 60-84 coupled to corresponding switches 100-124. Switch control signals S.sub.c4, S.sub.c3, S.sub.c2, S.sub.c1, and S.sub.c0, and S.sub.4, S.sub.3, S.sub.2, S.sub.1, and S.sub.0 control the switches such that each switch connects the corresponding calibration capacitor to either a first node V.sub.ref+ or a second node V.sub.ref-. Each switch control signal consists of two switch control bits which are combined by a logic function.

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A Low-Power 12-b Analog-to-Digital Converter with On-Chip Precision Trimming, Michiel de Wit, et al., IEEE Journal of Solid-State Circuits, vol. 28, No. 4, Apr. 1993, pp. 455-461.

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