Data processing: artificial intelligence – Knowledge processing system – Knowledge representation and reasoning technique
Reexamination Certificate
2009-06-29
2011-11-29
Gaffin, Jeffrey A (Department: 2129)
Data processing: artificial intelligence
Knowledge processing system
Knowledge representation and reasoning technique
C706S060000, C706S045000
Reexamination Certificate
active
08069130
ABSTRACT:
Methods and systems for semiconductor testing. In one embodiment, a semiconductor testing method includes one or more of the following stages: defining a rule relating to semiconductor testing, validating the rule, bundling the rule with other rules, correlating the rule with other rules, publishing the rule, actualizing the rule, and follow up relating to the rule. In one embodiment, a semiconductor testing system includes one or more of the following modules: rule creation module(s), analysis module(s), simulation module(s), real time production module(s), and offline production module(s). In one embodiment, user friendly graphical user interface(s) can be used for defining the building blocks of a rule and/or for viewing an optional hierarchy of categories to which the rule belongs.
REFERENCES:
patent: 5901154 (1999-05-01), Motohama et al.
patent: 5910895 (1999-06-01), Proskauer et al.
patent: 6083269 (2000-07-01), Graef et al.
patent: 6128759 (2000-10-01), Hansen
patent: 6574778 (2003-06-01), Chang et al.
patent: 6591152 (2003-07-01), Takano
patent: 6601203 (2003-07-01), Asano et al.
patent: 6618682 (2003-09-01), Bulaga et al.
patent: 6618853 (2003-09-01), Ohyama et al.
patent: 6711514 (2004-03-01), Bibbee
patent: 7668953 (2010-02-01), Sinclair et al.
patent: 2002/0147726 (2002-10-01), Yehia et al.
patent: 2003/0208345 (2003-11-01), O'Neill et al.
patent: 2004/0215361 (2004-10-01), Hlotyak et al.
patent: 2004/0225459 (2004-11-01), Krishnaswamy et al.
patent: 2005/0154551 (2005-07-01), Pramanick et al.
patent: 2005/0273685 (2005-12-01), Sachdev et al.
patent: 2005/0273736 (2005-12-01), Youngman et al.
patent: 2005/0278431 (2005-12-01), Goldschmidt et al.
patent: 2006/0013136 (2006-01-01), Goldschmidt et al.
patent: 2006/0052945 (2006-03-01), Rabinowitz et al.
patent: 2006/0053172 (2006-03-01), Gardner et al.
patent: 2007/0072091 (2007-03-01), Smith et al.
patent: 2007/0234246 (2007-10-01), Sinha et al.
patent: 2007/0240086 (2007-10-01), Sinha et al.
patent: WO 2006125771 (2006-11-01), None
Bruce A. Beitman, Generalization of Electromigration Ground Rules Utilizing Monte Carlo Simulation Methods, Feb. 1991, IEEE, 0894-6507/91/0200-0063,63-66.
“Wafer (electronics)”,Wikipedia, the free encyclopedia, printed on Feb. 28, 2006, last modified on Jan. 6, 2006, pp. 1-2. available online at http://en.wikipedia.org/wiki/Wafer—%28electronics%29.
“Integrated circuit”,Wikipedia, the free encyclopedia, printed on Feb. 28, 2006, last modified on Feb. 28, 2006, pp. 1-9. available online at http://en.wikipedia.org/wiki/Integrated—circuit.
Baldwin “Autonomous manufacturing systems”, Proceedings of the IEEE International Symposium on Intelligent Control, Albany (NY, USA), Sep. 25-26, 1989, pp. 214-220.
Gaffin Jeffrey A
Kennedy Adrian
Occhiuti Rohlicek & Tsao LLP
Optimaltest Ltd.
LandOfFree
Methods and systems for semiconductor testing using a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and systems for semiconductor testing using a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and systems for semiconductor testing using a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4282567