Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Reexamination Certificate
2005-11-04
2009-08-18
Nguyen, Hau H (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphic processing system
Plural graphics processors
C345S418000, C345S419000
Reexamination Certificate
active
07576746
ABSTRACT:
Methods and systems for enabling components of a computer graphics rasterization pipeline to be arbitrarily ordered are described. Various embodiments can permit a programmer to specify the order that the individual components of the rasterization pipeline are to be employed to process pixel or texel data. Various embodiments can also allow the temporary result of previous stages to be used in later stages for blending.
REFERENCES:
patent: 6184891 (2001-02-01), Blinn
patent: 6384824 (2002-05-01), Morgan et al.
patent: 6417858 (2002-07-01), Bosch et al.
patent: 6456285 (2002-09-01), Hayhurst
patent: 6466223 (2002-10-01), Dorbie et al.
patent: 6532009 (2003-03-01), Fox et al.
patent: 6636214 (2003-10-01), Leather et al.
White, Martin et al., “The Tayra 3-D Graphics Raster Processor,” Comput. & Graphics, vol. 21, No. 2, pp. 129-142, 1997.
Whitted, T., “Hardware Enhanced 3-D Raster Display System,” CMCCS '81—ACCHO '81, pp. 349-356.
Yamachi, Hidemi et al., “A Technique for Object and Collision Detection by Z-buffer,” Information Processing Society, vol. 43, No. 6, Jun. 2002, pp. 1899-1909.
Bresenham, Jack, “Teaching the graphics processing pipeline: cosmetic and geometric attribute implications,” Computers & Graphics 25 (2001), pp. 343-349.
Chen, Cheng-Hsien et al., “Reduce the Memory Bandwidth of 3D Graphics Hardware with a Novel Rasterizer,” Journal of Circuits, Systems, and Computers, vol. 11, No. 4 (2002) pp. 377-391.
Fuchs, H. et al., “Pixel-Planes: A VLSI-Oriented Design for 3-D Raster Graphics,” CMCCS '81—ACCHO '81, pp. 343-347.
Doctor, Louis et al., “Using raster scan in color graphics,” Raster Technologies, Mini-Micro Systems, Dec. 1981, pp. 102-107.
Parke, Frederic I., “Simulation and Expected Performance Analysis of Multiple Processor Z-Buffer Systems,” Computer Engineering, Case Institute of Technology, ACM, 1980, pp. 48-56.
Lee & Hayes PLLC
Microsoft Corporation
Nguyen Hau H
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