Methods and systems for packaging integrated circuits

Semiconductor device manufacturing: process – Semiconductor substrate dicing – With attachment to temporary support or carrier

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S108000, C438S113000, C438S458000, C257SE21503

Reexamination Certificate

active

08048781

ABSTRACT:
Methods of packaging integrated circuits are described. One method relates to attaching a singulated device wafer to a substrate. The singulated device wafer includes a multiplicity of integrated circuit dice arranged in a first configuration. The method also involves a substrate, which includes a sacrificial semiconductor wafer having device areas with metalized contacts. The device areas on the substrate may be arranged in a configuration matching that of the dice on the device wafer. The method also entails aligning the singulated device wafer as a whole with the substrate so that the dice of the device wafer are positioned substantially simultaneously over associated device areas on the substrate. The method also involves attaching the dice from the singulated wafer as a whole substantially simultaneously to the substrate such that each die of the device wafer is attached to an associated device area of the substrate.

REFERENCES:
patent: 3772064 (1973-11-01), Mendelson et al.
patent: 4442137 (1984-04-01), Kumar
patent: 5206181 (1993-04-01), Gross
patent: 5316853 (1994-05-01), Shibata et al.
patent: 5356949 (1994-10-01), Komiyama et al.
patent: 5597767 (1997-01-01), Mignardi et al.
patent: 5827394 (1998-10-01), Lu
patent: 5923995 (1999-07-01), Kao et al.
patent: 5960260 (1999-09-01), Umehara et al.
patent: 5969426 (1999-10-01), Baba et al.
patent: 6001671 (1999-12-01), Fjelstad
patent: 6023094 (2000-02-01), Kao et al.
patent: 6025650 (2000-02-01), Tsuji et al.
patent: 6175162 (2001-01-01), Kao et al.
patent: 6176966 (2001-01-01), Tsujimoto et al.
patent: 6214703 (2001-04-01), Chen et al.
patent: 6235366 (2001-05-01), Matsumoto et al.
patent: 6319754 (2001-11-01), Wang et al.
patent: 6333252 (2001-12-01), Jung et al.
patent: 6383833 (2002-05-01), Silverbrook
patent: 6398892 (2002-06-01), Noguchi et al.
patent: 6444310 (2002-09-01), Senoo et al.
patent: 6610167 (2003-08-01), Glenn et al.
patent: 6623594 (2003-09-01), Yamamoto et al
patent: 6702910 (2004-03-01), Noguchi et al.
patent: 6709953 (2004-03-01), Vasquez et al.
patent: 6746896 (2004-06-01), Shi et al.
patent: 6797541 (2004-09-01), Chun et al.
patent: 6812552 (2004-11-01), Islam et al.
patent: 6858919 (2005-02-01), Seo et al.
patent: 6873032 (2005-03-01), McCann et al.
patent: 6873059 (2005-03-01), Amagai et al.
patent: 6943434 (2005-09-01), Tangpuz et al.
patent: 6953988 (2005-10-01), Seo et al.
patent: 6964881 (2005-11-01), Chua et al.
patent: 6967125 (2005-11-01), Fee et al.
patent: 7009286 (2006-03-01), Kirloskar et al.
patent: 7095096 (2006-08-01), Mostafazadeh
patent: 7160755 (2007-01-01), Lo et al.
patent: 7244664 (2007-07-01), Blair et al.
patent: 7268012 (2007-09-01), Jiang et al.
patent: 7294911 (2007-11-01), Lee et al.
patent: 7432114 (2008-10-01), Teshirogi et al.
patent: 7507603 (2009-03-01), Berry et al.
patent: 2002/0093076 (2002-07-01), Fujii et al.
patent: 2003/0143819 (2003-07-01), Hedler et al.
patent: 2004/0038510 (2004-02-01), Munakata et al.
patent: 2004/0058478 (2004-03-01), Islam et al.
patent: 2004/0104491 (2004-06-01), Connell et al.
patent: 2004/0106233 (2004-06-01), Lin et al.
patent: 2004/0161876 (2004-08-01), Tandy et al.
patent: 2004/0191510 (2004-09-01), Kiuchi et al.
patent: 2005/0067680 (2005-03-01), Boon et al.
patent: 2005/0070095 (2005-03-01), Sharan et al.
patent: 2005/0153522 (2005-07-01), Hwang et al.
patent: 2007/0259515 (2007-11-01), Paik et al.
patent: 2008/0241991 (2008-10-01), Poddar et al.
patent: 2009/0152707 (2009-06-01), How et al.
patent: 54-131537 (1979-10-01), None
U.S. Appl. No. 11/958,288, filed Dec. 17, 2007.
U.S. Appl. No. 11/484,144, filed Jul. 10, 2006.
U.S. Appl. No. 11/691,428, filed Mar. 26, 2007.
Office Action dated May 28, 2009 in U.S. Appl. No. 11/484,144.
Office Action dated Nov. 20, 2009 in U.S. Appl. No. 11/958,288.
Office Action dated Feb. 4, 2010 in U.S. Appl. No. 11/484,144.
Notice of Allowance dated Mar. 29, 2010 from U.S. Appl. No. 11/958,288.
Final Office Action dated May 28, 2010 in U.S. Appl. No. 11/484,144.
Office Action dated Feb. 2, 2011 from U.S. Appl. No. 11/484,144.
Notice of Allowance dated Sept. 10, 2010 from U.S. Appl. No. 12/789,348.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods and systems for packaging integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods and systems for packaging integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and systems for packaging integrated circuits will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4306753

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.