Methods and systems for limiting supply bounce

Details Methods and systems for limiting supply bounce Methods and systems for limiting supply bounce

2005-03-08

2005-03-08

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Parallel controlled paths

C326S087000, C327S112000

Reexamination Certificate

active

06864737

ABSTRACT:
Methods and systems for limiting power supply and ground bounce enables control of the output current drive dependent on the changes in supply (VDD and GND) levels. This is made possible by making the gate drive of the output driver PMOS and NMOS dependent on the VDD and GND swings. When the VDD or GND increases above normal operating levels, the gate drive of the output driver PMOS is reduced and when the GND or VDD reduces below normal operating levels, the gate drive of the output driver NMOS is reduced. This leads to reduced current flow between the supplies and the pad thereby reducing the VDD and GND bounce problem.

REFERENCES:
patent: 6320433 (2001-11-01), Hinterscher
patent: 6380770 (2002-04-01), Pasqualini

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