Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2007-06-10
2009-08-04
Jeanglaude, Jean B (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C341S155000, C341S120000
Reexamination Certificate
active
07570191
ABSTRACT:
Methods and systems for designing a high resolution analog to digital converter (ADC) by eliminating the errors in the ADC stages. An error correction architecture and method eliminate the gain error and settling error of the residue amplifier in a pipelined ADC stage. A reference voltage error correction architecture and method eliminate the reference voltage error due to the sampling action in the ADC. The gain error correction method calculates the gain error using an error amplifier and eliminates the gain error at a later stage of the ADC. The reference voltage error correction method calculates the reference voltage error using an ideal reference voltage and corrects the error at a later stage of the ADC. Therefore, the constraints of gain and settling of the residue amplifier is significantly reduced.
REFERENCES:
patent: 5047772 (1991-09-01), Ribner
patent: 5220326 (1993-06-01), Ledzius et al.
patent: 5387914 (1995-02-01), Mangelsdorf
patent: 6396429 (2002-05-01), Singer et al.
patent: 6535157 (2003-03-01), Garrity et al.
patent: 6606042 (2003-08-01), Sonkusale et al.
patent: 6661214 (2003-12-01), Hann et al.
patent: 6734818 (2004-05-01), Galton
patent: 6825790 (2004-11-01), Chou
patent: 6891493 (2005-05-01), Whittaker et al.
patent: 6909391 (2005-06-01), Rossi
patent: 6963300 (2005-11-01), Lee
patent: 7158443 (2007-01-01), Lin
patent: 7248199 (2007-07-01), Asano et al.
patent: 7253686 (2007-08-01), Ali
patent: 7285996 (2007-10-01), Fiedler
patent: 2004/0036453 (2004-02-01), Rossi
patent: 2005/0212575 (2005-09-01), Kim
patent: 2007/0030753 (2007-02-01), Kwak
patent: 2007/0046345 (2007-03-01), Tai et al.
patent: 2008/0054963 (2008-03-01), Masenas
patent: WO 99/63414 (1999-12-01), None
Easwaran Prakash
Kali Bhattacharya Prasun
Srinivasa Shetty Venkatesh Teeka
Cosmic Circuits Private Limited
Evergreen Valley Law Group P.C.
Jeanglaude Jean B
Radhakrishnan Kanika
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