Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask
Reexamination Certificate
2001-06-29
2003-05-27
Rosasco, S. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Radiation modifying product or process of making
Radiation mask
Reexamination Certificate
active
06569584
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the fabrication of integrated circuits, and more particularly to reticles (masks) used during the fabrication of integrated circuits.
RELATED ART
Integrated circuit (IC) design typically utilizes computer simulation tools to help create a circuit schematic, which typically includes individual devices that are coupled together to perform a certain function. To actually fabricate an IC that performs this function, the circuit schematic must be translated into a physical representation known as a layout using computer-aided design (CAD) tools. The layout translates the discrete circuit elements of the circuit schematic into shapes that are used to construct the individual physical components of the circuit, such as gate electrodes, field oxidation regions, diffusion regions, and metal interconnections.
CAD tools that generate the layout are usually structured to function under a set of predetermined design rules in order to produce a functional circuit. These design rules are often determined by certain processing and design limitations defined by the particular IC fabrication process in which the layout is to be used, such as design rules defining the minimum space tolerance between devices or interconnect lines that prevent undesirable interaction between devices or lines. Design rule limitations are frequently referred to as critical dimensions. For example, a critical dimension of a circuit is commonly defined as the smallest width of a metal line or the smallest space between metal lines that can be supported by an IC fabrication process. Consequently, the critical dimension determines the overall size and density of the IC.
The layout is optically transferred onto a semiconductor substrate using a series of lithographic reticles (masks) and an exposure tool. Photolithography is a well-known process for transferring geometric shapes (mask pattern portions) present on each reticle onto the surface of a semiconductor substrate (e.g., a silicon wafer) using the exposure tool (e.g., an ultra-violet light source). In the field of IC lithographic processing, a photosensitive polymer film called photoresist is normally applied to the wafer and then allowed to dry. The exposure tool is utilized to expose the wafer with the proper geometrical mask patterns by transmitting UV light or radiation through the reticles. After exposure, the wafer is treated to develop the mask images transferred to the photosensitive material. These masking images are then used to create the device features of the circuit.
An important limiting characteristic of an exposure tool is its resolution value. The resolution value for an exposure tool is defined as the minimum mask pattern feature that the exposure tool can repeatedly expose onto the wafer. As the critical dimensions defined by IC fabrication processes grow ever smaller, the resolution values of features formed on the reticles used to fabricate ICs in accordance with the IC fabrication processes become correspondingly smaller.
While critical dimensions of IC features continue to shrink, the complexity and, hence, the overall size of many modern ICs continues to increase. These complex IC structures often require conductive (e.g., metal) lines for connecting various regions of the IC structure that are both long and narrow (i.e., having widths defined by the critical dimension of IC fabrication process utilized to produce the complex IC). To produce these long, narrow conductive lines, reticles are needed with correspondingly long and narrow mask lines.
FIG. 1
is an exploded perspective view showing a simplified conventional reticle
100
that is used during the optical transfer of long, narrow lines onto a semiconductor substrate (e.g., a wafer)
120
. Reticle
100
includes an opaque masking material (e.g., chrome) that is deposited on a transparent (e.g., glass) plate
105
and etched to form a lithographic mask pattern
110
. In the present example, mask pattern
110
includes a relatively long first mask line
111
, a relatively long second mask line
113
that is perpendicular to first mask line
111
and has an end
113
A that is separated from first mask line
111
by a gap
115
. In addition, mask pattern
110
may include additional mask structures, such as mask line
117
and mask line
119
, also shown in FIG.
1
. Note however, that the present invention is particularly directed to reticles on which these additional mask structures are significantly separated from elongated mask lines
111
and
113
for reasons that will become apparent below. Note that the depicted lengths, widths, and thicknesses of lines
111
,
113
and
117
in
FIGS. 1 and 2
are modified for descriptive purposes.
As depicted in
FIG. 1
, during an integrated circuit fabrication process, ultra-violet (UV) light or radiation emitted from an exposure tool (not shown) is transmitted through reticle
100
, thereby forming an image
122
of mask pattern
110
on semiconductor substrate
120
. As indicated by the tapered dashed lines in
FIG. 1
, the lithographic process typically utilizes an optical reduction system such that image
122
is substantially smaller than (e.g., ¼) the size of lithographic mask pattern
110
. Image
122
is then utilized, for example, to control an etching process during which metal lines are formed on semiconductor substrate
120
.
FIG. 2
is a plan view showing a portion of reticle
100
in which some of the masking material has melted and formed a bridge
130
across gap
115
between first line
111
and end
113
A of second line
113
. The present inventors have determined that long, narrow mask lines collect static charges during masking procedures, and that the static charges on adjacent mask lines induce opposite polarities. In loose mask patterns (i.e., mask pattern containing relatively few or widely disbursed mask structures), these opposite polarity charges can become significant, particularly at “T” intersections where perpendicular mask lines are separated by relatively small gaps. For example, referring to
FIG. 2
, first line
111
and second line
113
extend in perpendicular directions, and form a “T” intersection where the two lines are separated by a minimum distance (i.e., gap
115
). According to electrostatic theory, opposite polarity charges
130
(+) and
130
(−) collect in a region
111
A of first mask line
111
and end region
113
A of second mask line
113
, which are located on opposite sides of gap
115
, and produces a rapid electrostatic discharge when the line-of-force density and air break down voltage between the metal lines reaches a critical condition. The electrostatic discharge generates high temperatures that can damage the glass plate of the reticle between the two metal lines, and can melt the metal mask pattern material to form a bridge
135
linking first line
111
to second line
113
. When subsequently used in masking procedures, light transmission through the reticle is reduced by bridge
135
, thereby producing an incorrect image on the underlying semiconductor substrate (e.g., substrate
120
; see FIG.
1
).
What is needed is a reticle that is modified to prevent bridging of the masking material between adjacent elongated mask lines, thereby facilitating the development of fabrication processes for increasingly large IC patterns.
It is known to add small square shaped dummy mask portions to a reticle in order to distribute charge more evenly across the reticle. But the preferred location and distance from the mask line has not been known.
SUMMARY
The present invention is directed to a reticle having two or more elongated mask lines that is modified to include a pattern of dummy mask portions that are arranged adjacent to and parallel to at least one of the elongated mask lines and located a critical distance away from the elongated mask lines. As mentioned above, mask material (e.g., chrome) is conductive, and elongated mask lines collect static charges during IC fabrication procedures. Further, opposite charges t
Ho Jonathan J.
Wu Xin X.
Bever Patrick T.
Rosasco S.
Xilinx , Inc.
Young Edel M.
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