Methods and structures for pad reconfiguration to allow intermed

Semiconductor device manufacturing: process – With measuring or testing

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438 15, 438612, H01L 2166

Patent

active

060543345

ABSTRACT:
Methods and structures for pad reconfiguration to allow intermediate testing during the manufacture of an integrated circuit are disclosed. The methods and structures disclosed are particularly useful in testing an embedded subcircuit, such as a memory array within an embedded chip product. A bond pad reconfiguration etch and other means for reconfiguring a bond pad are also disclosed.

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