Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2002-09-06
2004-03-23
Nguyen, Viet Q. (Department: 2818)
Static information storage and retrieval
Interconnection arrangements
C365S051000, C257S314000, C257S315000
Reexamination Certificate
active
06711045
ABSTRACT:
TECHNICAL FIELD
This invention relates to integrated circuits including memory structures and relates to methods for making such memory structures and to methods using such memory structures in electronic devices.
BACKGROUND
As computer and other electrical equipment prices continue to drop, the manufacturers of storage devices, such as memory devices and hard drives, are forced to lower the cost of their components. At the same time, markets for computers, video games, televisions and other electrical devices are requiring increasingly larger amounts of memory to store images, photographs, videos, movies, music, and other storage intensive data. Thus, besides reducing costs, manufacturers of storage devices must also increase the storage density of their devices. This trend of increasing memory storage density while reducing costs required to create the storage has been on-going for many years, and even optical storage media, such as CD-ROM, CD-R, CD-RIW, DVD, and DVD-R variants, are being challenged by device size limitations and costs. There is accordingly a need for economical, high capacity memory structures and methods for control of such memory structures. While resistive elements, transistors, and diodes have been used as control elements in the past, they have had various shortcomings in speed, silicon area requirements, and in allowing “sneak paths.”
REFERENCES:
patent: 3271591 (1966-09-01), Ovshinsky
patent: 3530441 (1970-09-01), Ovshinsky
patent: 3641516 (1972-02-01), Castrucci et al.
patent: 4499557 (1985-02-01), Holmberg et al.
patent: 4599705 (1986-07-01), Holmberg et al.
patent: 5335219 (1994-08-01), Ovshinsky et al.
patent: 5751012 (1998-05-01), Wolstenholme et al.
patent: 5821558 (1998-10-01), Han et al.
patent: 6034882 (2000-03-01), Johnson et al.
patent: 6111302 (2000-08-01), Zhang et al.
patent: 6185122 (2001-02-01), Johnson et al.
patent: 6251710 (2001-06-01), Radens et al.
patent: 6351406 (2002-02-01), Johnson et al.
patent: 6372633 (2002-04-01), Maydan et al.
patent: 6380003 (2002-04-01), Jahnes et al.
patent: 6576969 (2003-06-01), Tran et al.
patent: 6625059 (2003-09-01), Sharma et al.
patent: 2001/0011776 (2001-08-01), Igarashi et al.
patent: 2001/0036750 (2001-11-01), Radens et al.
patent: 2001/0055838 (2001-12-01), Walker et al.
patent: 2002/0058408 (2002-05-01), Maydan et al.
patent: 2002/0075719 (2002-06-01), Johnson et al.
patent: 2002/0083390 (2002-06-01), Lee et al.
patent: 2003/0183867 (2003-10-01), Fricke et al.
patent: 2003/0183868 (2003-10-01), Fricke et al.
patent: 2003/0185034 (2003-10-01), Fricke et al.
Victor W. C. Chan et al., “Multiple Layers of CMOS Integrated Circuits Using Recrystallized Silicon Film” IEEE Electron Device Letters, V. 22, No. 2 (Feb. 2001) pp. 77-79.
Thomas H. Lee, “A Vertical Leap for Microchips” Scientific American, Jan. 2002, pp. 53-59.
Esmat Hamdy et al., “Dielectric based antifuses for logic and memory ICs” IEEE International Electron Devices Meeting, IEDM 88 (Aug. 1988) pp. 786-789.
Chenming Hu, “Interconnect devices for field programmable gate array” IEEE International Electron Devices Meeting, IEDM 92 (Apr. 1992) pp. 591-594.
Jonathan Greene et al., “Antifuse Field Programmable Gate Arrays” Proc. IEEE vol. 81 No. 7 (Jul. 1993), pp. 1042-1056.
Vivek D. Kulkarni et al. “Patterning of Submicron Metal Features and Pillars in Multilevel Metallization” J. Elctrochem Soc vol. 135 No. 12 (Dec. 1988) pp. 3094-3098.
[Document above is J. Electrochem. Soc., vol. 135 No. 12 (Dec. 1988), pp. 3094-3098].
Ellenson James E.
Fricke Peter
Van Brocklin Andrew L.
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