Methods and apparatuses for circuit simulation

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C716S110000

Reexamination Certificate

active

08065129

ABSTRACT:
Methods and apparatuses for transient simulation of circuits. One embodiment of the present invention eliminates the inductive branch current variables in terms of node voltage variables to generate a linear equation system with a sparse, symmetric and positive definite matrix, which can be solved efficiently using a pre-conditioned conjugate gradient method. The known vector of the linear equation system includes the contribution from the known inductive branch currents at a previous time instance. In one embodiment of the present invention, a node on a branch to a known voltage, such as ground, and on two resistive branches are identified and eliminated to form the linear equation system with a reduced dimension. In one embodiment of the present invention, multiple time step sizes are selectively used to balance the accuracy in transient simulation and efficiency.

REFERENCES:
patent: 5826215 (1998-10-01), Garrett et al.
patent: 6063130 (2000-05-01), Sakamoto
patent: 6101323 (2000-08-01), Quarles et al.
patent: 7107198 (2006-09-01), Leonhardt
Pillage et al., “Electronic Circuit and System Simulation Methods”, McGraw Hill, 1995, pp. 1-6, 18-24, 31-36, 47-50, 75-86.
Gersem et al., “Solution Strategies for Transient, Field-Circuit Coupled Systems”, IEEE Transcations on Magnetics, Jul. 2000, vol. 36, No. 4.
Chen et al. “Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods” ACM, DAC Jun. 18-22, 2001, pp. 559-562.
Golub GH, Van Loan CF. “Matrix Computations” Baltimore, Maryland: Johns Hopkins University Press 1983. Specifically Chapter 10.2: The Conjugate Gradient Method, pp. 520-532 http://books.google.com/books?id=mlOa7wPX6OYC&dq=matrix+computations&printsec=frontcover&source=bl&ots=lbfng6H4fV&sig=rL2VymjnVMrO8un1yj7760—uXeQ&hl=en&ei=tn7LSsLCOISeswPym7ycAQ&sa=X&oi=book—result&ct=result&resnum=3#v=onepage&q=&f=false.
Demmel, J.W. “Applied Numerical Linear Algebra,” Society for Industrial and Applied Mathematics (SIAM), 1997. Specifically 6.6.3-6.6.5 Conjugate Gradient Method, pp. 307-316. http://books.google.com/books?id=Ir8cFi-YWnlC&dq=applied+numerical+linear+algebra+demmel&printsec=frontcover&source=bl&ots=N5RMoQ7NNS&sig=yAFHEHxAPokMBtbbBiXxlmcEYrk&hl=en&ei=rn—LSvmbKJLUsgPRiZ2QAQ&sa=X&oi=book—result&ct=result&resnum=2#v=onepage&q=&f=false.
Kaustav Banerjee, et al. “Analysis and Optimization of Thermal Issues in High-Performance VLSI”. Apr. 2001. pp. 230-237. Sonoma, California.
Kyoung Keun Lee, et al. “Thermal-driven Circuit Partitioning and Floorplanning with Power Optimization”. School of Electrical and Computer Engineering.
Guoqiang Chen, et al. “Partition-Driven Standard Cell Thermal Placement”. Apr. 2003. pp. 75-80. Monterey, California.
Farid N. Najm. “A Survey of Power Estimation Techniques in VLSI Circuits”. IEEE Trans. on VLSI, Dec. 1994. pp. 1-21.
Shamik Das, et al. “Timing, Energy, and Thermal Performance of Three-Dimensional Integrated Circuits”. Apr. 2004. Boston, Massachusetts.
Osman S. Unsal, et al. “System-Level Power-Aware Design Techniques in Real-Time Systems”. Proceedings of the IEEE, vol. 91, No. 7, Jul. 2003.
Kaushik Roy, et al. “Leakage Current Mechanisms and Leakage Reduction Techniques in Deep-Submicrometer CMOS Circuits”. Proceedings of the IEEE, vol. 91, No. 2, Feb. 2003.
Pillage, L. T., et al., “Electronic Circuit of System Simulation Methods”, pp. 200-204. Chaper 7.6 Sparse Tableau Analysis.
Tsai, Ching-Han, et al. “Standard Cell Placement for Even On-Chip Thermal Distribution”, 6 pages. University of Illinois at Urbana-Champaign, Department of Electrical and Computer Engineering, Coordinated Science Laboratory.
Chen, Tsung-Hao, et al., “Efficient Large-Scale Power Grid Analysis Based on Preconditioned Krylov-Subspace Iterative Methods” Copyright 2001 ACM 0-89791-88-6/97/05 DAC 2001, Jun. 18-22, 2001, Las Vegas, Nevada USA 4 pages.
Clark, J.V., et al., “3D MEMS Simulation Modeling Using Modified Nodal Analysis”, 8 pages. Berkeley Sensor and Actuator Center, 497 Cory Hall, University of California at Berkeley, Berkeley CA, USA cfm@bsac.eecs.berkeley.edu.
Clark, J.V., et al., “Modified Nodal Analysis for MEMS with Multi-Energy Domains”, 4 pages. Berkeley Sensor and Actuator Center, 497 Cory Hall, University of California at Berkeley, Berkeley CA, USA jvclark@bsac.eecs.berkeley.edu nzhou@bsac.eecs.berkeley.edu.
Nassif, Sani R., et al., “Fast Power Grid Simulation” Copyright 2000 ACM 1-58113-188-7/00/0006, pp. 156-161. DAC 2000, Los Angeles CA.
Zachmann, Dave “Conjugate Gradient Method”, 4 pages, Feb. 5, 1999 downloaded from http://cauchy.math.colostate.edu/Resources/SD—CG/conjgrad
ode1.html.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods and apparatuses for circuit simulation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods and apparatuses for circuit simulation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatuses for circuit simulation will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4274163

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.