Methods and apparatus to insure correct predecode

Details Methods and apparatus to insure correct predecode Methods and apparatus to insure correct predecode

2008-05-20

2008-05-20

Chan, Eddie (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction decoding

Predecoding of instruction component

Reexamination Certificate

active

11066957

ABSTRACT:
Techniques for ensuring a synchronized predecoding of an instruction string are disclosed. The instruction string contains instructions from a variable length instruction set and embedded data. One technique includes defining a granule to be equal to the smallest length instruction in the instruction set and defining the number of granules that compose the longest length instruction in the instruction set to be MAX. The technique further includes determining the end of an embedded data segment, when a program is compiled or assembled into the instruction string and inserting a padding of length, MAX−1, into the instruction string to the end of the embedded data. Upon predecoding of the padded instruction string, a predecoder maintains synchronization with the instructions in the padded instruction string even if embedded data is coincidentally encoded to resemble an existing instruction in the variable length instruction set.

REFERENCES:
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patent: 6192465 (2001-02-01), Roberts
patent: 6247097 (2001-06-01), Sinharoy
patent: 6253309 (2001-06-01), Mahalingaiah
patent: 2004/0107217 (2004-06-01), Hastings
patent: 05116819 (2005-12-01), None

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