Methods and apparatus to dynamically insert prefetch...

Details Methods and apparatus to dynamically insert prefetch... Methods and apparatus to dynamically insert prefetch...

2003-12-19

2009-08-18

Bullock, Jr., Lewis A (Department: 2193)

Data processing: software development, installation, and managem

Software program development tool

Translation of code

C711S213000, C712S207000

Reexamination Certificate

active

07577947

ABSTRACT:
Methods and apparatus to dynamically insert prefetch instructions are disclosed. In an example method, one or more samples associated with cache misses are identified from a performance monitoring unit in a processor system. Based on sample information associated with the one or more samples, delinquent information is generated. To dynamically insert one or more prefetch instructions, a prefetch point is identified based on the delinquent information.

REFERENCES:
patent: 5964867 (1999-10-01), Anderson et al.
patent: 6145121 (2000-11-01), Levy et al.
patent: 6567975 (2003-05-01), Damron
patent: 6728955 (2004-04-01), Berry et al.
patent: 6782454 (2004-08-01), Damron
patent: 2002/0073405 (2002-06-01), Chilimbi
patent: 2003/0145314 (2003-07-01), Nguyen et al.
patent: 2004/0261062 (2004-12-01), Chilimbi
patent: 2005/0120337 (2005-06-01), Serrano et al.
patent: 2005/0177822 (2005-08-01), Kuch et al.
patent: 2006/0059474 (2006-03-01), Bhansali et al.
patent: 2007/0174597 (2007-07-01), Joy et al.
Luk et al. “Compiler-Based Prefetching for Recursive Data Structures”, Sep. 1996, ACM SIGPLAN Notices, vol. 31, Issue 9, pp. 222-233.
Lu et al. “The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System”, Dec. 3-5, 2003, 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003.
Chilimbi et al.,Using Generational Garbage Collection to Implement Cache-Conscious Data Placement, in the Proceedings of the International Symposium on Memory Management 37 (1998).
Calder et al.,Cache-Conscious Data Placement, in the Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems 139 (1998).
Chilimbi et al.,Cache-Conscious Structure Layout, in the SIGNPLAN Conference on Programming Language Design and Implementation 1 (1999).
Dimpsey et al.,Java Server Performance: A Case Study of Building Efficient, Scalable Jvms, 39 IBM Systems Journal 151 (2000).
Arnold et al.,Adaptive Optimization in the Jalapeno JVM: The Controller's Analytical Model, in ACM Conference on Object-Oriented Programming Systems, Languages, and Applications (2000).
Chilimbi et al.,Dynamic Hot Data Stream Prefetching for General-Purpose Programs, in the Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation 199 (2002).
Liao et al.,Post-Pass Binary Adaptation for Software-Based Speculative Precomputation, in the Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Iimplementation 117 (2002).
Luk et al.,Profile-Guided Post-Link Stride Prefetching, in the Proceedings of the International Conference on Supercomputing 167 (2002).
Shuf et al.,Creating and Preserving Locality of Java Applications at Allocation and Garbage Collection Times, in the Proceedings of the ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages, and Applications 13 (2002).
Inagaki et al.,Stride Prefetching by Dynamically Inspecting Objects, in the Proceedings of the ACM SIGPLAN Conference on Programming Language, Design and Implementation 269 (2003).
Wu et al.,Value-Profile Guided Stride Prefetching for Irregular Code, in the Proceedings of the 11th International Conference on Compiler Construction 307 (2002).
Choi Y., Knies A., Vedaraman G., Williamson J.,Design and Experience: Using the Intel Itanium 2 Processor Performance Monitoring Unit to Implement Feedback Optimizations, 2ndWorkshop on EPIC Architectures and Compiler Technology, pp. 1-11, XP002326247, pp. 1-3 (Nov. 18, 2002).
Chilimbi, T.M.,Efficient Representations and Abstractions for Quantifying and Exploiting Data Reference Locality, ACM SIGPlan 2001 Conference on Programming Language Design and Implementation, pp. 1-12, XP002326248, pp. 4-5; Fig. 4 (Jun. 2001).
Inagaki, T., Onodera, T., Komatsu, H., Nakatani, T.,Stride Prefetching by Dynamically Inspecting Objects, Proceedings of the ACM SIGPlan 2003 Conference on Programming Language Design and Implementation, pp. 269-277, XP002326249, p. 274 (Jun. 9, 2003).
Chilimbi, T.M., et al.,Using Generational Garbage Collection to Implement Cache-Conscious Data Placement, ACM SIGPlan Notices, Association for Computing Machinery, New York, US, vol. 34, No. 3, pp. 37-48, XP000993595, ISSN: 0362-1340, pp. 37-48 (Mar. 1999).
Tabatabai, A., et al.,Prefetch Injection Based on Hardware Monitoring and Object Metadata, Proceedings of the ACM SIGPlan 2004 Conference on Programming Language Design and Implementation, pp. 267-276, XP002326250, pp. 267-276 (Jun. 9, 2004).
Written Opinionfor PCT/US2004/040482 (May 25, 2005).
International Search Reportfor PCT/US2004/040482 (May 25, 2005).
Jacobson E. et al., Assigning confidence to conditional branch predictions,Proceedings of the 29thAnnual IEEE/ACM International Symposium on Microarchitectur, Micro-29, Dec. 2-4, 1996,Proceedings of the Annual IEEE/ACM International Symposium on Microarchitecture. (MICRO), Los Alamitos, IEEE Comp. Soc. Press, U, vol. SYMP. 29, Dec. 2, 1996, pp. 142-152.
International Preliminary Report on Patentability corresponding to International Patent Application Serial No. PCT/US2004/040482, mailed Jun. 29, 2006, 9 pages.

Affiliated with

Also associated with

Rating

Methods and apparatus to dynamically insert prefetch... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods and apparatus to dynamically insert prefetch..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and apparatus to dynamically insert prefetch... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4104847